Semiconductor Substrate Patterning for Dislocation-Reduced Crystal Growth
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Solution Overview
Problem
Existing methods for manufacturing semiconductor substrates face challenges in suppressing the introduction of dislocations during crystal growth, particularly when the growth surfaces progress along a direction orthogonal to the c-axis, leading to defects in the growth layer.
Innovation Solution
A method involving a processing step to form a pattern with a minor angle on the underlying substrate, followed by a crystal growth step using zippering bonding and a physical vapor transport method to suppress dislocation introduction, where the growth layer is formed along both the c-axis and a-axis directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If crystal growth is performed on a flat underlying substrate, then the manufacturing process is simple, but dislocations are introduced into the growth layer from the substrate
Solution Approach 1:
A pattern with a minor angle is formed on the underlying substrate surface before crystal growth begins. This preliminary surface modification creates specific geometric features that guide dislocation behavior during subsequent crystal growth, preventing dislocation propagation into the growth layer while maintaining a relatively simple overall process flow
Solution Approach 2:
The underlying substrate surface is modified locally by forming a pattern with a minor angle at specific regions. This local surface modification creates asymmetric geometric features that selectively influence dislocation propagation in certain areas, allowing dislocation suppression without requiring complete substrate replacement or complex global restructuring
2Reliability
If crystal growth surfaces progress along a direction orthogonal to the c-axis, then bonding between growth surfaces can occur, but new dislocations are introduced at bonding interfaces
Solution Approach 1:
A pattern with a minor angle (asymmetric geometry) is formed on the underlying substrate surface. This asymmetric pattern creates non-uniform surface features that influence crystal growth dynamics, particularly at bonding interfaces between growth surfaces progressing orthogonal to the c-axis. The asymmetric geometry helps distribute and mitigate dislocation formation at bonding interfaces, improving growth layer quality while allowing bonding to proceed
3Reliability
If a pattern with a minor angle is formed on the underlying substrate, then dislocation introduction is suppressed, but additional processing steps are required
Solution Approach 1:
The pattern with a minor angle is formed as a preliminary step before crystal growth. By preparing the substrate surface in advance with the appropriate geometric pattern, the process ensures dislocation suppression during growth without requiring complex real-time adjustments or post-growth processing, thereby maintaining reasonable manufacturing efficiency
Solution Approach 2:
The surface geometry of the underlying substrate is modified by forming a pattern with a specific minor angle. This parameter change in surface morphology creates favorable conditions for dislocation suppression during crystal growth. The specific angular parameter of the pattern is optimized to achieve effective dislocation control while minimizing the complexity and time of the patterning process itself
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces dislocation density in the growth layer, enhancing the quality and integrity of the semiconductor substrate by minimizing defects.
Implementation Method 1
the crystal growth step is a step of growing via a physical vapor transport method
Implementation Method 2
using a temperature gradient or a chemical potential as a driving force
Implementation Method 3
in the crystal growth step, zippering bonding is performed on the underlying substrate to form the growth layer
Implementation Method 4
the through hole formation step is a step of forming the through holes by irradiating the underlying substrate with a laser
Implementation Method 5
the strained layer removal step is a step of removing the strained layer of the underlying substrate by heat treatment
Data Source
AI summary
The problem to be solved by the present invention is to provide novel technology capable of suppressing the introduction of displacement to a growth layer. The present invention, which solves the abovementioned problem, pertains to a method for manufacturing a semiconductor substrate, the method including: a processing step for removing a portion of a base substrate and forming a pattern that includes a minor angle; and a crystal growth step for forming a growth layer on the base substrate where the patter has been formed. In addition, the present invention pertains to a method for suppressing the introduction of displacement to a growth layer, the method including a processing step for removing a portion of the base substrate and forming a pattern that includes a minor angle prior to forming the growth layer on the base substrate.