Semiconductor Substrate with Segmented Protection Layer for Fine Pitch Bridging
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Solution Overview
Problem
Conventional semiconductor substrates face issues with bridge and short-circuit formation due to solder balls connecting adjacent pads, which is particularly severe in substrates with fine pitch designs.
Innovation Solution
A semiconductor substrate design featuring a dielectric layer with a first circuit layer embedded and exposed, covered by a first protection layer with conductive posts, and an electrical contact layer on the opposite surface, along with a second protection layer, which reduces the risk of bridging by using conductive posts to connect external circuits without direct exposure of the circuit layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pads are directly exposed on the semiconductor substrate to carry solder balls, then electrical connection to external circuits is achieved, but bridge and short-circuit formation between adjacent pads occurs
Solution Approach 1:
The patent introduces a protection layer as an intermediary between the circuit layer and the external environment. This protection layer covers the circuit layer and defines holes that expose only specific contact pads, preventing solder balls from bridging adjacent pads while maintaining electrical connection functionality.
Solution Approach 2:
The protection layer is segmented to cover different regions of the circuit layer selectively. By defining holes at specific locations, the protection layer segments the exposure areas, allowing only necessary contact pads to be exposed while protecting others, thereby preventing short-circuits between adjacent pads.
2Object-affected harmful factors
If the circuit layer is completely covered by protection layer, then bridge and short-circuit formation is reduced, but electrical connection to external circuits cannot be established
Solution Approach 1:
The protection layer is segmented with defined holes at specific locations to expose contact pads. This segmentation allows the protection layer to cover and protect most of the circuit layer while selectively exposing necessary contact areas for electrical connection, thus resolving the contradiction between protection and connectivity.
Solution Approach 2:
The protection layer exhibits different properties in different regions: it is covering and protective in most areas, while having holes in specific locations to allow electrical connection. This local differentiation of quality enables simultaneous achievement of protection and connectivity functions.
3Productivity
If fine pitch design is used to increase substrate integration, then device functionality is enhanced, but bridge and short-circuit formation between adjacent pads becomes more severe
Solution Approach 1:
The protection layer serves as an intermediary that becomes increasingly important in fine pitch designs. As pad spacing decreases, the protection layer provides a physical barrier that prevents solder balls from bridging adjacent pads, enabling fine pitch designs to be implemented without proportionally increasing short-circuit risk.
Solution Approach 2:
The protection layer segments the exposed areas into isolated contact pads, preventing lateral connectivity between adjacent pads. This segmentation effect becomes more critical in fine pitch designs where the distance between pads is reduced, as it maintains electrical isolation even when pads are closely spaced.
4Object-affected harmful factors
If protection layers are added to prevent bridging, then short-circuit formation is reduced, but substrate warpage increases due to thickness imbalance
Solution Approach 1:
The patent employs asymmetric protection layer configuration where the first protection layer on the circuit layer side and the second protection layer on the contact layer side have different thicknesses. The first protection layer is thicker than the second protection layer, creating an asymmetric structure that compensates for warpage caused by the embedded circuit layer while maintaining the bridging prevention function.
Solution Approach 2:
The patent controls the thickness parameters of protection layers to balance warpage prevention and short-circuit protection. Specifically, the first protection layer thickness is controlled to be greater than the second protection layer thickness, with the difference optimized to counteract warpage from the embedded circuit layer while maintaining adequate protection against bridging.
Data Source
AI summary
A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.