Semiconductor Device With Substrate Via Interconnects
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Solution Overview
Problem
Existing semiconductor drive circuits for electric power steering systems experience increased interlinkage flux and surge voltage due to maximized wiring loops, leading to torque ripple and inefficiencies in power transmission.
Innovation Solution
A semiconductor device with a substrate featuring half bridges comprising upper and lower switching elements connected in series, where the upper switching elements are on one surface and the lower switching elements are on the opposite surface, with electrical connections through the substrate, reducing the wiring loop length and interlinkage flux.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If drive circuits of respective phases are disposed adjacent to each other on one side of the substrate, then the wiring loop length is maximized, but the interlinkage flux is increased and surge voltage is increased
Solution Approach 1:
The patent applies dimensionality change by moving switching elements from a two-dimensional planar arrangement to a three-dimensional configuration utilizing both surfaces of the substrate. Specifically, upper switching elements are disposed on the front surface while lower switching elements are disposed on the back surface, connected through conductive paths extending through the substrate. This spatial redistribution reduces the wiring loop area and minimizes interlinkage flux between adjacent phase circuits.
2Length of stationary object
If drive circuits of respective phases are disposed adjacent to each other on one side of the substrate, then the wiring loop length is maximized, but the surge voltage is increased
Solution Approach 1:
The patent applies dimensionality change by moving switching elements from a two-dimensional planar arrangement to a three-dimensional configuration utilizing both surfaces of the substrate. Specifically, upper switching elements are disposed on the front surface while lower switching elements are disposed on the back surface, connected through conductive paths extending through the substrate. This spatial redistribution reduces the wiring loop area and minimizes interlinkage flux between adjacent phase circuits.
3Object-generated harmful factors
If the wiring loop length is reduced by separating upper and lower switching elements, then the interlinkage flux is reduced, but the device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the substrate into distinct functional regions: the front surface for upper switching elements, the back surface for lower switching elements, and through-substrate conductive paths for interconnection. This segmentation allows independent optimization of each region while reducing overall interlinkage flux. The modular structure facilitates manufacturing and reduces design complexity despite the three-dimensional configuration.
Data Source
AI summary
A third upper MOS and a third motor relay are disposed on a front surface of a substrate. A third shunt resistor and a third lower MOS are disposed on a back surface of the substrate. The substrate has a via electrically connecting interconnects. Thus, a source electrode of the third upper MOS and a drain electrode of the third motor relay are electrically connected to a source electrode of the third lower MOS by the via.