Semiconductor Substrate Via Wiring for Contamination Control
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices face challenges in using solder-coated connection terminals due to contamination risks during wet processing, and laser processing damages the semiconductor chip's circuit elements, limiting the materials that can be used for insulation layers.
Innovation Solution
A semiconductor device structure with a substrate, an electronic component, and a sealing resin layer, where a via extends through an insulation layer to form additional wiring that connects the electronic component without exposing the solder-coated connection terminal, allowing for the use of materials with photosensitivity and non-photosensitivity for the insulation layer, and preventing contamination during wet processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a solder-coated connection terminal is used on the electronic component, then electrical connection is improved, but contamination occurs during wet processing to form additional wiring
Solution Approach 1:
The patent divides the substrate into two separate surfaces: a first surface for mounting the electronic component and a second surface for forming additional wiring. This spatial segmentation allows the solder-coated connection terminal to remain protected on the first surface while wet processing is performed on the second surface, eliminating contamination while maintaining electrical connection reliability
Solution Approach 2:
The patent transitions from a single-sided wiring approach to a dual-sided wiring architecture, moving the additional wiring formation to the opposite surface of the substrate. This dimensional change enables simultaneous existence of solder-coated terminals and wet-processed wiring without interference, resolving the contamination issue while preserving electrical functionality
2Productivity
If laser processing is used to form a hole exposing the connection terminal, then manufacturing efficiency is improved, but the circuit element of the semiconductor chip is damaged
Solution Approach 1:
The patent separates the functions of the two substrate surfaces: the first surface is dedicated to electronic component mounting with protected connection terminals, while the second surface is designated for hole formation and additional wiring. This segmentation eliminates the need for laser processing near sensitive circuit elements, maintaining both manufacturing efficiency and circuit integrity
Solution Approach 2:
The patent introduces the second substrate surface as an intermediary zone where hole formation and wiring operations can be performed without directly exposing the sensitive circuit elements on the chip. This intermediary surface acts as a buffer that enables aggressive processing methods while protecting vulnerable components
3Adaptability or versatility
If the connection terminal is exposed to form additional wiring, then electrical connection flexibility is improved, but the material selection for insulation layers is restricted
Solution Approach 1:
By dividing the substrate into two functional surfaces, the patent enables the second surface to be used for forming holes and additional wiring without exposing the connection terminal. This segmentation removes the constraint that forced use of photosensitive materials, allowing selection of any suitable insulation layer material while maintaining electrical connection flexibility through the via structure
Data Source
AI summary
An electronic component incorporation substrate and a method for manufacturing the same that provide a high degree of freedom for selecting materials. An electronic component incorporation substrate includes a first structure, which has a substrate and an electronic component. The substrate includes a substrate body having first and second surfaces. A first wiring pattern is formed on the first surface and electrically connected to a second wiring pattern formed on the second surface through a through via. The electronic component is electrically connected to the first wiring pattern. The electronic component incorporation substrate includes a sealing resin, which seals the first structure, and a third wiring pattern, which is connected to the second wiring pattern through a second via.