Semiconductor Element Size Reduction via Substrate Wiring
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing the size of semiconductor elements due to the need for large surface areas for internal wirings with low impedance, particularly in display driver applications, where the existing techniques do not adequately address the reduction of size when considering both input and output signals.
Innovation Solution
The semiconductor device incorporates a grayscale voltage generating unit with reference voltage electrodes and internal wirings connected to external input and output terminals through specific wiring patterns on the substrate, allowing for a compact design by optimizing the placement and routing of these components to minimize surface area while maintaining low impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the line width of semiconductor element internal wirings is increased to reduce impedance, then the impedance is reduced, but the surface area of the semiconductor element must be made greater
Solution Approach 1:
The patent extends wiring patterns from the semiconductor element onto the substrate, utilizing the substrate's surface area to reduce impedance without increasing the semiconductor element's surface area. The wiring patterns are formed on the substrate in regions extending beyond the semiconductor element boundaries, effectively moving the impedance-reducing function to another dimensional space.
Solution Approach 2:
The substrate serves as an intermediary carrier that hosts extended wiring patterns. These wiring patterns on the substrate act as intermediate conductive paths that connect to the semiconductor element internal wirings, providing additional low-impedance pathways without requiring increased area within the semiconductor element itself.
2Area of moving object
If the surface area of the semiconductor element is reduced to make it compact, then the device size is reduced, but the impedance of internal wirings increases
Solution Approach 1:
The patent compensates for the reduced semiconductor element area by extending wiring patterns onto the substrate, utilizing external space to maintain low impedance. This dimensional extension allows compact semiconductor elements while preserving electrical performance through substrate-mounted wiring extensions.
Solution Approach 2:
The conductive path is segmented into two parts: internal wirings within the semiconductor element and extended wiring patterns on the substrate. This segmentation allows the semiconductor element to be compact while the substrate provides additional low-impedance pathways, dividing the impedance-reduction function across multiple locations.
3Reliability
If extended wiring patterns are formed on the substrate to reduce impedance, then the impedance is reduced, but the device complexity increases
Solution Approach 1:
The substrate serves multiple functions: it acts as a mounting platform for the semiconductor element, provides extended wiring patterns for impedance reduction, and serves as a structural support. This multi-functionality reduces device complexity by consolidating multiple roles into a single component rather than requiring separate elements for each function.
Data Source
AI summary
A semiconductor device, a semiconductor element, and a substrate are provided, which allow the semiconductor element to be provided with a reduced size when combined. The semiconductor device has a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and the external output terminal. The semiconductor element includes a grayscale voltage generating unit for generating a plurality of grayscale voltages by dividing a reference voltage, a plurality of electrodes for the reference voltage formed in the neighborhood of the grayscale voltage generating unit; and an internal wiring for connecting the grayscale voltage generating unit and the reference voltage electrodes. The substrate includes a wiring pattern for the reference voltage for connecting the external input terminal and the reference voltage electrodes.