Semiconductor Sum-of-Product Device Scaling Circuit Compensation
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Solution Overview
Problem
Semiconductor devices used for sum-of-product computations face instability in conductance and resistance due to various factors, leading to errors in computation results.
Innovation Solution
A semiconductor device with an inputting circuit, scaling circuit, computing memory, and outputting circuit that transforms input signals into compensated signals using non-linear or linear functions to maintain accurate computation results despite factors like rolling off, pitching up, temperature changes, or retention time issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are used for sum-of-product computation, then computation capability is provided, but conductance and resistance stability deteriorates due to various factors affecting the final computation result
Solution Approach 1:
The patent applies preliminary action by transforming input signals before they are applied to the computing memory. The signal transformation circuit pre-compensates for expected variations in conductance and resistance by modifying the input signals in advance, so that the computation accounts for these variations before they affect the result. This allows the system to maintain reliable computation results despite inherent device instabilities.
2Speed
If input signals are directly applied to computing memory, then computation speed is maintained, but computation accuracy deteriorates due to instability in conductance and resistance
Solution Approach 1:
The patent introduces an intermediary signal transformation circuit between the input signals and the computing memory. This intermediary circuit transforms the input signals to compensate for conductance and resistance variations, ensuring accurate computation results without requiring slower direct measurement or correction methods. The transformation acts as a mediator that preserves both speed and accuracy.
3Device complexity
If no signal transformation is applied, then device complexity is minimized, but computation reliability deteriorates due to uncorrected errors from conductance and resistance variations
Solution Approach 1:
The patent applies parameter changes by transforming the input signals to different voltage or current levels before applying them to the computing memory. The signal transformation circuit adjusts parameters such as signal amplitude, offset, or scaling factors to compensate for expected conductance and resistance variations. This approach maintains relatively simple device structure while significantly improving computation reliability through parameter optimization.
Data Source
AI summary
A semiconductor device for performing a sum-of-product computation and an operating method thereof are provided. The semiconductor device includes an inputting circuit, a scaling circuit, a computing memory and an outputting circuit. The inputting circuit is used for receiving a plurality of inputting signals. The inputting signals are voltages or currents. The scaling circuit is connected to the inputting circuit for transforming the inputting signals to be a plurality of compensated signals respectively. The compensated signals are voltages or currents. The computing memory is connected to the scaling circuit. The computing memory includes a plurality of computing cells and the compensated signals are applied to the computing cells respectively. The outputting circuit is connected to the computing memory for reading an outputting signals of the computing cells. The outputting signal is voltage or current.