Semiconductor Super Junction Outer Peripheral Region Design
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Solution Overview
Problem
The breakdown voltage and breakdown resistance in the outer peripheral region of existing semiconductor devices with super junction structures are not always sufficient, leading to potential device failure under excessive inductive loads.
Innovation Solution
A semiconductor device with a super junction structure is designed, featuring a parallel p/n junction structure in both the element forming region and the outer peripheral region, where a second-conductivity-type annular diffusion region is formed around the base region, and a field insulating film covers the annular diffusion region, alleviating electric field concentration and enhancing breakdown voltage and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a super junction structure is adopted to reduce on-resistance, then the on-resistance can be reduced beyond the Si limit, but the breakdown voltage and breakdown resistance in the outer peripheral region become insufficient
Solution Approach 1:
The patent applies different structures to different regions: the element forming region uses a standard super junction structure with column regions, while the outer peripheral region uses a modified structure with annular diffusion regions instead of column regions. This local differentiation allows the center region to achieve low on-resistance while the peripheral region maintains high breakdown voltage.
Solution Approach 2:
The patent segments the semiconductor device into two distinct functional zones: an element forming region for current conduction and an outer peripheral region for voltage blocking. Each zone is optimized with appropriate structures (column regions vs. annular diffusion regions) to fulfill its specific function without compromising the other.
2Reliability
If the breakdown voltage of the outer peripheral region is increased to prevent device failure under excessive inductive loads, then the reliability improves, but the device complexity increases
Solution Approach 1:
The patent merges the voltage blocking function into the outer peripheral region by forming annular diffusion regions that extend around the element forming region. This integration allows the peripheral region to handle voltage blocking without requiring separate protective structures, thereby improving reliability while controlling complexity.
3Reliability
If a parallel p/n junction structure is formed in the outer peripheral region, then the breakdown voltage is maximized, but the electric field concentration occurs at the junction
Solution Approach 1:
The patent replaces the linear column regions with annular (curved) diffusion regions in the outer peripheral region. This curved geometry distributes the electric field more uniformly around the perimeter, preventing concentration at sharp corners or linear interfaces while maintaining the parallel p/n junction structure for high breakdown voltage.
Solution Approach 2:
The patent converts the potentially harmful electric field concentration at the p/n junction into a beneficial distributed field by using annular diffusion regions. The curvature of the annular structure transforms the field concentration issue into a field distribution advantage, where the electric field is spread along the curved interface, maximizing breakdown voltage without localized stress points.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design effectively alleviates electric field concentration and improves breakdown voltage and breakdown resistance in the outer peripheral region, ensuring the semiconductor device's reliability under high inductive loads.
Implementation Method 1
alleviating electric field concentration and enhancing breakdown voltage and resistance
Data Source
AI summary
In one aspect, a semiconductor device includes a semiconductor substrate; and a transistor element including a parallel structure of a first-conductivity-type drift region and a second-conductivity-type column region, and a second-conductivity-type base region, the transistor element being formed on the semiconductor substrate. An outer peripheral region located outside an element forming region has a parallel structure of a first-conductivity-type drift region and a second-conductivity-type column region, and a second-conductivity-type annular diffusion region which is formed at a side of the base region and which is spaced apart from the base region. An innermost end and a neighboring portion thereof of the annular diffusion region are located on the column region, and an outermost end of the annular diffusion region is located outside an outermost peripheral column region. A field insulating film that covers the annular diffusion region is stacked on the semiconductor layer in the outer peripheral region.