Semiconductor-Superconductor Nanowire Fabrication With Selective Growth

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Solution Overview

Problem

Current methods for fabricating semiconductor-superconductor nanowires face challenges with scalability, limiting the size and complexity of nanowire networks due to issues like soft gap states caused by disorder at the semiconductor-superconductor interface, which affect the stability of Majorana zero modes essential for topological quantum computing.

Innovation Solution

The method combines selective area grown semiconductor technology with superconductor deposition/growth, using a dielectric mask to expose regions for semiconductor growth and angling the superconductor beam to prevent shadow regions, allowing for the formation of high-quality, scalable semiconductor-superconductor platforms with tunable in-plane nanowires and reduced soft gap decoherence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional fabrication methods are used to improve semiconductor-superconductor interface quality, then interface quality improves, but scalability deteriorates

Engineering Contradiction:
Improveinterface qualityVSAvoidscalability
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The fabrication process is segmented into distinct phases: dielectric mask formation, selective area semiconductor growth, and superconductor deposition. Each phase is optimized independently, allowing high interface quality through precise control of growth conditions while maintaining scalability through standardized process modules that can be replicated across large substrate areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Selective area growth is employed where semiconductor material is grown only in specific exposed regions defined by the dielectric mask. This local growth approach ensures high interface quality in the semiconductor-superconductor contact regions while allowing other areas to be optimized for different functions, enabling both precision and scalability.

Inventive Principle:
Principle #3Local quality

2Productivity

If selective area growth is used to enable scalable fabrication, then scalability improves, but interface disorder increases

Engineering Contradiction:
ImprovescalabilityVSAvoidinterface quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

A dielectric mask is formed on the substrate before semiconductor growth to predefine the exact regions where semiconductor material will be grown. This preliminary patterning ensures that subsequent selective area growth produces uniform, high-quality interfaces across the entire substrate, maintaining interface quality while enabling scalable fabrication of large nanowire networks.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dielectric mask serves as an intermediary element that mediates between the scalable fabrication process and the high interface quality requirement. It provides a stable, patterned template that guides selective area growth, ensuring consistent interface formation across large substrate areas without direct human intervention in each growth region.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If soft gap states are present at the interface, then fabrication simplicity is maintained, but Majorana mode stability deteriorates

Engineering Contradiction:
Improvefabrication simplicityVSAvoidMajorana mode stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The fabrication process controls key parameters including semiconductor crystal orientation, growth temperature, and superconductor deposition conditions to minimize soft gap states. By optimizing these parameters during selective area growth and superconductor deposition, high interface quality is achieved that supports stable Majorana modes while maintaining a streamlined fabrication process.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the fabrication of large and complex semiconductor-superconductor nanowire networks with reduced soft gap decoherence, supporting stable Majorana modes for fault-tolerant quantum computations and scalable quantum circuit production.

Implementation Method 1

In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions

Methodology Applied
Scientific EffectSelective area growth: Epitaxy

Implementation Method 2

The layer of superconducting material may be epitaxially grown in the superconductor growth phase

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 3

The superconducting material may be epitaxially grown using molecular beam epitaxy (MBE)

Methodology Applied
Scientific EffectMolecular beam epitaxy: Chemical Beam Epitaxy

Data Source

PatentUS11974509B2Superconductor-semiconductor fabrication
Publication Date: 2024.04.30 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11974509B2 patent drawing
  • US11974509B2 patent drawing
  • US11974509B2 patent drawing

AI summary

A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. In a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.