Semiconductor Module Support Geometry for CTE Stress Relief
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Solution Overview
Problem
Thermally induced degradation due to mismatched Coefficient of Thermal Expansion (CTE) values in semiconductor modules leads to attachment layer breakage, limiting their lifetime.
Innovation Solution
Implementing an attachment layer portion with a peripheral limit forming acute angles, preferably less than 90°, to reduce thermal stresses and prevent crack formation, combined with specific configurations of the intermediate and main supports to enhance structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the attachment layer portion uses conventional peripheral limits (right angles or rounded corners), then the manufacturing process is simpler, but thermal stresses cause crack formation and attachment breakage, reducing module lifetime
Solution Approach 1:
The patent applies asymmetry by designing the peripheral limit with acute angles (less than 90 degrees) instead of conventional right angles or rounded corners. This asymmetric geometric configuration redistributes thermal stresses away from critical stress concentration points, preventing crack initiation and propagation in the attachment layer portion during thermal cycling, thereby improving reliability without significantly complicating manufacturing
Solution Approach 2:
The patent changes the geometric parameter of the peripheral limit from conventional right angles (90 degrees) or rounded corners to acute angles (less than 90 degrees). This parameter modification fundamentally alters the stress distribution pattern in the attachment layer, reducing thermal stress concentration and preventing attachment breakage while maintaining manufacturing feasibility
2Temperature
If the attachment layer portion is made larger to improve thermal management, then heat dissipation improves, but thermal stresses increase due to CTE mismatch, leading to earlier failure
Solution Approach 1:
The patent applies local quality by optimizing the peripheral limit geometry specifically at the boundaries of the attachment layer portion. The acute angled configuration is applied locally at the peripheral limit where stress concentration occurs, rather than changing the entire attachment layer design. This localized geometric modification effectively manages thermal stresses while allowing the attachment layer to maintain its heat dissipation function
3Ease of manufacture
If conventional right angles are used at the peripheral limit, then the design is simpler and easier to manufacture, but stress concentration occurs at the corners, causing crack initiation and reducing lifetime
Solution Approach 1:
The patent replaces the symmetric conventional right-angled peripheral limit with an asymmetric acute-angled configuration. This asymmetric design eliminates the stress concentration that occurs at 90-degree corners while remaining compatible with standard manufacturing processes, thus maintaining ease of manufacture while significantly improving resistance to crack formation
Solution Approach 2:
While the patent primarily uses acute angles, the principle of avoiding sharp 90-degree corners aligns with the concept of using curved or rounded transitions to reduce stress concentration. The acute angled configuration provides a controlled geometric transition that distributes stress more evenly compared to sharp right angles, achieving similar stress-relief effects through angular geometry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly increases the lifetime of semiconductor modules by reducing thermal stresses and crack formation, as demonstrated by improved viscoplastic energy density and lifetime simulations.
Implementation Method 1
Such attachment break is mainly due to the mismatch existing between respective Coefficient of Thermal Expansion (CTE) values of the materials involved in the above-described module assembly. Today, occurrence of such thermally induced degradation is a major limitation to the lifetime of the semiconductor modules.
Data Source
Figure 1a~1b
Figure 2
Figure 3a~3c
AI summary
A semiconductor module comprises at least one semiconductor die (1), an intermediate support (3), a main support (4; 5) and an attachment layer portion (6) for connecting the intermediate support to the main support. The attachment layer portion has a peripheral limit (L1) designed for increasing a lifetime of the semiconductor module. Further improvements are proposed, including providing same peripheral limits (L2, L3, L4) to layer portions of the intermediate support and/or providing the main support with a step (ST) or a groove.