Semiconductor Support Element for Thin Substrate Stability

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Solution Overview

Problem

Manufacturing power transistors on thin to ultra-thin substrates poses challenges in maintaining stability of single chips during processing and handling, as existing methods struggle to ensure mechanical stability and prevent warpage during frontend and backend processes.

Innovation Solution

Incorporating a support element with specific dimensions over the semiconductor substrate, where the support element has a smallest lateral extension t at a side adjacent to the main surface and a height h, with relationships 0.1×h≤d≤4×h and 0.1×h≤t≤1.5×h, to enhance mechanical stability and reduce warpage, while also forming a metallization layer that may embed or be flush with the support element.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the semiconductor substrate is thinned to less than 100 μm to achieve smaller on-resistance, then the on-resistance decreases, but the mechanical stability and handling stability of single chips deteriorate

Engineering Contradiction:
Improveon-resistanceVSAvoidmechanical stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The substrate is divided into a thin semiconductor substrate portion and a separate support element, allowing the substrate to be thin for low resistance while the support element provides mechanical stability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A support element is introduced as an intermediary structure between the thin semiconductor substrate and the handling environment, providing mechanical support without interfering with the electrical performance of the thin substrate

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the semiconductor substrate is thinned to less than 100 μm to achieve smaller on-resistance, then the on-resistance decreases, but warpage during processing increases

Engineering Contradiction:
Improveon-resistanceVSAvoidwarpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The substrate structure is segmented into a thin active semiconductor portion and a thicker support element, allowing the active region to remain thin for low resistance while the support portion prevents warpage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The device combines the thin semiconductor substrate with a support element made of suitable material to create a composite structure that achieves both low resistance and dimensional stability during processing

Inventive Principle:
Principle #40Composite materials

3Stability of the object's composition

If a support element is added to improve mechanical stability, then handling stability improves, but device complexity increases

Engineering Contradiction:
Improvehandling stabilityVSAvoidstructure complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The support element is strategically positioned only in regions where mechanical support is needed, rather than uniformly across the entire device, minimizing added complexity while maximizing stability benefits

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10199332B2Method of manufacturing a semiconductor device comprising a support element and semiconductor device comprising a support element
Publication Date: 2019.02.05 INFINEON TECHNOLOGIES AG
  • US10199332B2 patent drawing
  • US10199332B2 patent drawing
  • US10199332B2 patent drawing

AI summary

A semiconductor device includes a power transistor in a semiconductor substrate portion, where the semiconductor substrate portion includes a central portion and a kerf, components of the power transistor are arranged in the central portion, and the central portion has a thickness d. The semiconductor device also includes a support element disposed over a main surface of the central portion, where the support element has a smallest lateral extension t at a side adjacent to the main surface of the semiconductor substrate portion and a height h, where 0.1×h≤d≤4×h and 0.1×h≤t≤1.5×h.