Semiconductor Device Surge Protection via Shared Source FET
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Solution Overview
Problem
Existing semiconductor devices with nitride semiconductors lack effective protection against surge voltages applied between the gate and source electrodes, as well as between the gate and drain electrodes, which can lead to device failure.
Innovation Solution
Incorporating a second field-effect transistor element as a protection element, connected to the first field-effect transistor element, which forms a Schottky junction or p-n junction with the semiconductor layer, allowing for the reduction of surge voltages by creating an electric current path when negative surge voltages are applied, thereby enhancing the tolerance of the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protection transistor is added to protect against negative surge voltage on the gate electrode, then the tolerance for negative surge voltage is improved, but the device complexity increases
Solution Approach 1:
The patent merges the protection function into the existing FET structure by using the source electrode as a common node for both the main transistor and protection transistor. This sharing of the source electrode reduces the number of additional components needed compared to a fully separate protection circuit, thereby limiting the increase in device complexity while still achieving surge voltage protection.
Solution Approach 2:
The protection transistor acts as an intermediary element that activates only during surge conditions. By using a normally-off configuration that turns on only when negative surge voltage is detected at the gate, the protection mechanism intervenes selectively without permanently altering the basic FET structure or adding continuous complexity to normal operation.
2Productivity
If the element size is reduced to achieve high power density, then the productivity is improved, but the risk of breakage due to surge voltage increases
Solution Approach 1:
The protection transistor is configured to activate before the surge voltage can cause damage to the FET. By detecting negative voltage at the gate and immediately turning on the protection path, the system creates a preliminary protective action that clamps the voltage before it reaches dangerous levels, thus protecting the compact high-power-density device without requiring larger physical dimensions.
Solution Approach 2:
The patent changes the operational parameters of the protection transistor by using a normally-off configuration with specific threshold characteristics. This allows the device to remain compact while the protection function activates at specific voltage thresholds, providing surge protection adapted to the high power density operating conditions without increasing element size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively improves the tolerance of the semiconductor device to surge voltages applied to the gate electrode, both between the gate and source electrodes and between the gate and drain electrodes, reducing the risk of device failure and ensuring secure operation.
Implementation Method 1
the second gate electrode forms either one of a Schottky junction and a p-n junction with the second semiconductor layer stacked body
Implementation Method 2
the second gate electrode forms either one of a Schottky junction and a p-n junction with the second semiconductor layer stacked body
Data Source
AI summary
A semiconductor device includes: a first semiconductor layer stacked body including a compound semiconductor; a first field-effect transistor element including a first drain electrode, a first source electrode, and a first gate electrode that are provided on the first semiconductor layer stacked body; a second semiconductor layer stacked body including a compound semiconductor; and a second field-effect transistor element including a second drain electrode, a second source electrode, and a second gate electrode that are provided on the second semiconductor layer stacked body. The second gate electrode forms a Schottky junction or a p-n junction with the second semiconductor layer stacked body, the second drain electrode is connected to the first drain electrode, the second source electrode is connected to the first gate electrode, and the second gate electrode is connected to the first source electrode.