Semiconductor Switch Biasing for Stable On-Resistance
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Solution Overview
Problem
Conventional semiconductor switches, such as CMOS transmission gates, experience significant on-resistance variation with power supply voltage and signal voltages, leading to undesirable distortion in audio signals, especially when signals operate outside the power supply range.
Innovation Solution
A semiconductor circuit design that includes a level shifting circuit with a series diode and a supply coupling circuit to stabilize the control node voltage, coupled with a charge pump to provide a boosted supply voltage, ensuring minimal on-resistance variation across a wide input voltage range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional CMOS transmission gate is used, then the switch can be controlled to connect or disconnect signals, but the on-resistance varies significantly with power supply voltage and signal voltages, causing distortion in audio signals
Solution Approach 1:
The patent changes the biasing parameters of the switch transistor by introducing a level-shifting circuit that applies a constant voltage offset between the control node and the bulk terminal. This parameter change ensures the transistor operates in the velocity saturation region, maintaining constant on-resistance despite variations in power supply voltage and signal voltages.
Solution Approach 2:
The patent introduces a level-shifting circuit as an intermediary element between the control signal and the transistor gate. This level shifter with series diode acts as a mediator that provides a stable reference potential, isolating the transistor's on-resistance from variations in the control signal and power supply voltage.
2Use of energy by moving object
If the power supply voltage is low, then power consumption is reduced, but the on-resistance variation increases considerably with respect to signals IN and OUT
Solution Approach 1:
The patent changes the operating parameters of the transistor by biasing it with a constant gate-to-bulk voltage through the level-shifting circuit. This parameter change ensures the transistor operates in the velocity saturation region, making on-resistance independent of drain-source voltage variations that occur at low power supply voltages.
Solution Approach 2:
The patent applies preliminary action by pre-biasing the transistor gate through the level-shifting circuit before the actual signal switching occurs. This preliminary biasing establishes a stable operating point that maintains constant on-resistance regardless of subsequent signal voltage variations or low power supply conditions.
3Adaptability or versatility
If signals IN and OUT are operated outside of the power supply range, then signal dynamic range is expanded, but audio signal distortion increases significantly
Solution Approach 1:
The level-shifting circuit acts as an intermediary that decouples the transistor's on-resistance from the control signal voltage range. By providing a constant gate-to-bulk voltage offset, it ensures the transistor remains in velocity saturation region even when signals operate outside the power supply range, preventing distortion.
Solution Approach 2:
The patent changes the transistor's operating parameters by establishing a fixed gate-to-bulk voltage through the level-shifting circuit with series diode. This parameter change ensures the transistor operates in the velocity saturation region, making on-resistance independent of drain-source voltage and allowing signals to swing beyond the power supply range without distortion.
Data Source
AI summary
In one embodiment, a semiconductor circuit for coupling a first node to a second node includes a first transistor having a first terminal coupled to the first node, a second terminal coupled to the second node, and a control terminal coupled to a control node. The circuit also includes a level shifting circuit having a series diode for coupling a bulk terminal of the first transistor to the control node, and a supply coupling circuit coupled between a first power supply node and the control node.


