High Frequency Semiconductor Switch Gate Wiring Voltage Distribution
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Solution Overview
Problem
High frequency semiconductor switches with comb transistors face issues with voltage distribution due to long gate lengths, leading to deteriorated insertion loss and harmonic characteristics.
Innovation Solution
A field effect transistor configuration with a gate wiring that has a parallel portion with two ends, allowing voltage to be applied to each end, reducing voltage drop and improving uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate length is extended to cover the source and drain regions, then the switching capability is improved, but voltage distribution deteriorates due to resistance
Solution Approach 1:
The gate wiring is segmented into multiple sections with different resistance characteristics. A first gate wiring section with lower resistance is positioned at the central region where voltage distribution is critical, while a second gate wiring section with higher resistance is positioned at the side regions. This segmentation allows each section to be optimized for its specific functional requirement, resolving the contradiction between extended gate length and voltage distribution.
Solution Approach 2:
Different regions of the gate wiring are assigned different resistance qualities to match local requirements. The central region under the gate electrode receives lower resistance wiring to ensure uniform voltage distribution, while side regions can tolerate higher resistance. This local quality differentiation resolves the contradiction by applying appropriate resistance characteristics to specific locations rather than using a uniform structure.
2Reliability
If the gate length is extended, then the transistor coverage is improved, but insertion loss characteristics deteriorate
Solution Approach 1:
The gate wiring is divided into first and second sections with different resistance values. The first section with lower resistance is placed at the central region to minimize voltage drop and insertion loss where the gate electrode actively controls the channel, while the second section with higher resistance is placed at side regions where the gate electrode does not extend. This segmentation maintains transistor coverage while reducing insertion loss in critical areas.
3Reliability
If the gate length is extended, then the transistor coverage is improved, but harmonic characteristics deteriorate
Solution Approach 1:
Different resistance qualities are assigned to different gate wiring regions. The central region with the gate electrode receives low-resistance wiring to ensure proper voltage distribution and minimize harmonic distortion, while side regions without gate electrode coverage can have higher resistance. This local quality approach maintains transistor coverage while improving harmonic characteristics by ensuring adequate voltage distribution where it matters most.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances voltage distribution, thereby improving insertion loss and harmonic characteristics by reducing voltage drop and ensuring uniform voltage distribution across the gate.
Implementation Method 1
a gate wiring applying voltage to the gate; and a gate via electrically connecting the gate to the gate wiring
Data Source
AI summary
There is provided a high frequency semiconductor switch for improving insertion loss characteristics and harmonic characteristics by providing good voltage distribution in a gate wiring. The field effect transistor includes a source wiring electrically connected to a source region formed on a substrate and extending unidirectionally; a drain wiring electrically connected to a drain region formed on the substrate and extending in parallel with the source wiring; a gate having a parallel portion extending between the source wiring and the drain wiring in approximately parallel with the source wiring and the drain wiring; a gate wiring applying voltage to the gate; and a gate via electrically connecting the gate to the gate wiring, the parallel portion including two ends and formed with a path applying voltage to each of the two ends from the gate via.