High-Frequency Semiconductor Switching Circuit Logic Synthesis
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Solution Overview
Problem
Conventional high-frequency semiconductor switching circuits face challenges in achieving low insertion loss and high isolation while reducing size and power consumption, particularly in mobile communication devices, due to the need for multiple control terminals and power supply terminals, which limits the ability to have two or more path switching FET stages in a conducting state simultaneously.
Innovation Solution
A high-frequency semiconductor switching circuit with a diode-switch logic circuit that controls path switching FET stages and shunt FET stages using logic synthesis voltages, eliminating the need for a power supply terminal by generating gate voltages for shunt FET stages from control voltages applied to path switching FET stages, allowing multiple path switching FET stages to be in a conducting state simultaneously while maintaining low insertion loss and high isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple control terminals and power supply terminals are added to enable simultaneous activation of multiple path switching FET stages, then the functionality and versatility of the switching circuit are improved, but the device size and terminal count increase
Solution Approach 1:
The logic synthesis circuit enables the existing control terminals to perform multiple functions: they control both the path switching FET stages directly and generate control signals for shunt FET stages through logic synthesis. This multi-functionality allows simultaneous activation of multiple paths without adding new control terminals, resolving the contradiction between versatility and device size.
Solution Approach 2:
The circuit uses its own control terminal signals to generate additional control signals through the logic synthesis circuit. The control terminals serve themselves by providing the input signals that are synthesized to control the shunt FET stages, eliminating the need for external power supply terminals or additional control inputs.
2Adaptability or versatility
If multiple control terminals and power supply terminals are added to enable simultaneous activation of multiple path switching FET stages, then the versatility of the switching circuit is improved, but the number of terminals increases
Solution Approach 1:
The existing control terminals are made universal by having them serve dual purposes: direct control of path switching FET stages and indirect control of shunt FET stages through the logic synthesis circuit. This eliminates the need for additional terminals while maintaining enhanced versatility.
Solution Approach 2:
The control functions for path switching FET stages and shunt FET stages are merged into a unified system where the logic synthesis circuit combines the control terminal signals to generate appropriate control voltages for both types of FET stages, reducing the total terminal count.
3Area of stationary object
If a power supply terminal is eliminated by generating gate voltages from control voltages, then the device size and power consumption are reduced, but the control circuit complexity increases
Solution Approach 1:
The control circuit serves itself by using the existing control terminal voltages as inputs to the logic synthesis circuit, which then generates the necessary gate voltages for shunt FET stages. This self-service approach eliminates the need for external power supply terminals while keeping the control circuit relatively simple.
Solution Approach 2:
The logic synthesis circuit acts as an intermediary that transforms the control terminal voltages into the appropriate gate voltages for shunt FET stages. This intermediary component enables voltage generation without direct power supply connections, reducing device size while managing control circuit complexity through a dedicated synthesis block.
4Reliability
If conventional switching circuits are used with multiple control terminals, then the isolation and insertion loss properties are maintained, but the device size and power consumption increase
Solution Approach 1:
The circuit maintains high isolation by using the logic synthesis circuit to generate appropriate control voltages for shunt FET stages from the existing control terminals. This self-service mechanism ensures proper isolation without requiring additional terminals or increasing device size.
Solution Approach 2:
The control terminals are made multi-functional, controlling both path switching and isolation functions through the logic synthesis circuit. This universality maintains the isolation performance of conventional circuits while reducing the terminal count and device size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a high-function high-frequency switching circuit with reduced size and power consumption, capable of causing multiple path switching FET stages to be in a conducting state simultaneously, while maintaining low insertion loss and high isolation, without adding a power supply terminal, thus addressing the size and power consumption limitations of conventional circuits.
Implementation Method 1
A high-frequency semiconductor switching circuit with a diode-switch logic circuit that controls path switching FET stages and shunt FET stages using logic synthesis voltages, eliminating the need for a power supply terminal by generating gate voltages for shunt FET stages from control voltages applied to path switching FET stages
Data Source
AI summary
A diode-switch logic circuit of the present invention is configured such that: at least one of paths between a common input-output terminal and respective individual input-output terminals is caused to become a conducting state; control voltages of control terminals are respectively applied to gates of path switching FET stages; logic synthesis voltages of the control voltages of the control terminals are respectively applied to gates of shunt FET stages; and each of the logic synthesis voltages is generated by a logical product of a logical negation of the control voltage applied to one shunt FET stage and a logical sum of the control voltages respectively applied to the remaining shunt FET stages.