Semiconductor Task Sequencing with Queue Time Constraints

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Solution Overview

Problem

In semiconductor manufacturing, queue time constraints pose significant sequencing hurdles due to the need to schedule tasks like dielectric layer deposition and post-deposition anneal processes within tight time frames, with no existing mathematical algorithm to determine sufficient capacity for subsequent processes, leading to inefficiencies in scheduling multiple tasks across semiconductor processing equipment stations.

Innovation Solution

A method for sequencing tasks involves generating a schedule by iteratively performing a scheduling process, identifying highly constrained tasks based on latest and earliest start times, and determining capacity across semiconductor processing equipment stations, with tasks being assigned at next available times to optimize scheduling and update start times accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If tasks are scheduled within tight queue time limits, then manufacturing precision is improved, but device complexity increases due to the need for sophisticated scheduling algorithms

Engineering Contradiction:
Improvequeue time constraint complianceVSAvoidscheduling system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The scheduling problem is segmented into two distinct phases: (1) identifying highly constrained tasks using mathematical formulas based on queue time limits, and (2) iteratively scheduling these constrained tasks first, then filling remaining slots with less constrained tasks. This segmentation transforms a complex holistic scheduling problem into manageable discrete steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The method performs preliminary identification and scheduling of highly constrained tasks before addressing less constrained tasks. By calculating earliest start times, latest start times, and queue time limits in advance, the system prepares a prioritized task list that guides the iterative scheduling process, ensuring critical constraints are met first.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If iterative scheduling is performed to accommodate queue time limits, then manufacturing precision is improved, but loss of time increases due to multiple scheduling iterations

Engineering Contradiction:
Improvetask sequencing accuracyVSAvoidscheduling computation time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The system performs preliminary calculations of earliest start times, latest start times, and queue time limits for all tasks before the iterative scheduling begins. This pre-computation phase identifies highly constrained tasks in advance, reducing the complexity of each iteration and accelerating the overall scheduling process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The scheduling process is divided into distinct phases: preliminary constraint analysis, identification of highly constrained tasks, iterative scheduling of constrained tasks, and final filling of remaining slots. This segmentation allows each phase to be optimized independently, reducing total computation time while maintaining scheduling accuracy.

Inventive Principle:
Principle #1Segmentation

3Reliability

If capacity constraints are enforced across multiple equipment stations, then reliability is improved, but productivity decreases due to limited scheduling flexibility

Engineering Contradiction:
Improveschedule feasibilityVSAvoidprocessing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The scheduling system dynamically adjusts task assignments across iterations, allowing flexible repositioning of tasks within their valid time windows (between earliest and latest start times). This dynamic approach maintains capacity constraints while exploring multiple scheduling configurations to maximize throughput.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The iterative process incorporates feedback by evaluating schedule feasibility after each task assignment, checking capacity constraints at each equipment station, and adjusting subsequent task assignments accordingly. This feedback mechanism ensures reliability while progressively optimizing for productivity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10162341B2Method for sequencing a plurality of tasks performed by a processing system and a processing system for implementing the same
Publication Date: 2018.12.25 APPLIED MATERIALS INC
  • US10162341B2 patent drawing
  • US10162341B2 patent drawing
  • US10162341B2 patent drawing

AI summary

A method for sequencing a plurality of tasks performed by a processing system and a processing system for implementing the same are disclosed herein. In one embodiment, a method for sequencing a plurality of tasks performed by a processing system is provided that includes generating a schedule by iteratively performing a scheduling process and processing a plurality of substrates using the plurality of semiconductor processing equipment stations according to the schedule. The scheduling process uses highly constrained tasks and determines whether a portion of the first list of the highly constrained tasks exceeds a capacity of the processing system. The scheduling process further includes updating the latest start time and the earliest start time associated with each of the plurality of tasks yet to be scheduled based on the assigned task.