Power Semiconductor Temperature Estimation in Shared Radiators
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Solution Overview
Problem
Existing temperature estimation devices for power semiconductor chips in multi-motor systems with shared heat radiators struggle to accurately estimate temperatures due to the influence of heat from other power semiconductor modules, leading to potential adverse effects such as degradation or failure.
Innovation Solution
A temperature estimation device that calculates the temperature of a power semiconductor chip by considering the electric power losses in both the target module and other modules, using first and second electric power loss calculations, temperature differences, and a reference temperature, to accurately estimate the chip's temperature, and includes a motor control device that restricts output when the estimated temperature exceeds a predetermined level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If temperature estimation is performed using only the electric power loss of the target power semiconductor module, then the estimation process is simple, but the temperature estimation accuracy deteriorates due to heat influence from other modules sharing the same heat radiator
Solution Approach 1:
The total electric power loss is segmented into two distinct components: the first electric power loss from the target power semiconductor module and the second electric power loss from other power semiconductor modules sharing the heat radiator. This segmentation allows the estimation to account for heat influence from multiple sources while maintaining a structured calculation approach.
Solution Approach 2:
The temperature estimation merges both the first electric power loss (target module) and the second electric power loss (other modules) into a comprehensive calculation. By combining these loss components, the system achieves accurate temperature estimation that reflects the total thermal environment in the shared heat radiator.
2Volume of moving object
If multiple power semiconductor modules are arranged in the same heat radiator to reduce system size, then the system compactness is improved, but the temperature estimation accuracy deteriorates due to mutual heat influence between modules
Solution Approach 1:
The invention segments the heat source contributions by separately calculating the first electric power loss for the target module and the second electric power loss for other modules. This segmentation enables the system to handle compact multi-module arrangements while accurately attributing thermal influences to their respective sources.
Solution Approach 2:
The estimation method changes the calculation parameters by incorporating both first and second electric power losses, along with their respective temperature differences. This parameter expansion allows accurate temperature estimation in compact configurations where multiple modules share a heat radiator, accounting for mutual thermal interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for precise temperature estimation of power semiconductor chips in multi-motor systems with shared heat radiators, effectively preventing overheating and protecting the chips from adverse effects, even when the temperature of one chip differs from others in the same radiator.
Implementation Method 1
A temperature of the power semiconductor chip rises by an electric power loss generated at the time of energization of the power semiconductors, and by an electric power loss generated at the time of switching of the power semiconductors.
Data Source
AI summary
A temperature calculation unit calculates a temperature T1 of one power semiconductor chip as a temperature estimating target, from a reference temperature, a temperature difference ΔT1, and a temperature difference ΔT2. The temperature difference ΔT1 is calculated based on an electric power loss Q1 generated in all power semiconductor chips of a power semiconductor module containing one power semiconductor chip as the temperature estimating target. The temperature difference ΔT2 is calculated based on the electric power loss Q1 and an electric power loss Q2 generated in all power semiconductor chips of a power semiconductor module other than the power semiconductor module containing one power semiconductor chip as the temperature estimating target.