Semiconductor Template Bonding for Smooth Group III Metal Polar Surfaces
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Solution Overview
Problem
Conventional methods for manufacturing semiconductor templates with group III metal polar surfaces face challenges such as low yield, high costs, and surface roughness due to hillocks, especially in one-step substrate bonding processes, which also struggle to achieve high-quality crystallinity.
Innovation Solution
A method involving a one-step substrate bonding process that includes growing a first semiconductor layer with a metal polar surface, forming a polarity inversion layer, growing a second semiconductor layer with a nitrogen polar surface, bonding it to a support substrate, separating the growth substrate, and removing the first semiconductor layer to expose the metal polar surface, followed by re-growing a device layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a one-step substrate bonding process is used to manufacture semiconductor template, then yield increases and process costs reduce, but surface roughness increases and crystallinity quality deteriorates
Solution Approach 1:
The patent divides the substrate bonding process into two distinct steps: first bonding a primary support substrate, then bonding a secondary support substrate after removing the initial growth substrate. This segmentation allows each bonding step to be optimized independently, maintaining high yield benefits while improving surface quality through the second bonding operation that replaces the rough first substrate.
Solution Approach 2:
The patent introduces a primary support substrate as an intermediary element in the bonding process. This intermediate substrate serves as a temporary carrier that enables the first bonding operation, then gets replaced by a secondary support substrate that provides the final high-quality surface. The intermediary allows the process to achieve both high yield and low surface roughness.
2Manufacturing precision
If a two-step substrate bonding process is used to manufacture semiconductor template, then surface roughness reduces and crystallinity quality improves, but yield decreases and process costs increase
Solution Approach 1:
The patent merges the benefits of both one-step and two-step processes by combining the high-yield advantage of one-step bonding with the high-quality surface outcome of two-step bonding. The method achieves this by performing two bonding operations within a single integrated process flow, ultimately delivering both high yield and low surface roughness simultaneously.
3Manufacturing precision
If CMP process is introduced to reduce surface roughness, then surface quality improves, but process costs significantly increase
Solution Approach 1:
The patent replaces the mechanical CMP (chemical-mechanical polishing) process with a bonding-based approach. Instead of using mechanical polishing to reduce surface roughness, the method uses a second bonding operation with a new support substrate that provides a inherently smooth surface, thereby eliminating the need for expensive CMP processing while achieving the same surface quality improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of high-quality semiconductor templates with excellent crystallinity using a one-step process, reducing costs and minimizing surface roughness without the need for additional polishing, and allows for larger wafer sizes.
Implementation Method 1
growing a first semiconductor layer having a metal polar surface on a growth substrate
Implementation Method 2
growing a second semiconductor layer having a nitrogen polar surface on the polarity inversion layer
Implementation Method 3
bonding the second semiconductor layer and a support substrate
Implementation Method 4
removing the first semiconductor layer and the polarity inversion layer to expose a metal polar surface of the second semiconductor layer
Data Source
AI summary
The present invention pertains to a method for manufacturing a semiconductor template, in which a high-quality, highly crystalline Group III metal polar surface is obtained by performing a substrate bonding process only once by selectively growing AlxGa1-xN materials having different polarities on a nominal on-axis c-plane sapphire substrate or Si(111) initial growth substrate without using an expensive off-angle sapphire substrate.