Semiconductor Package Terminal Area Distribution for Heat Stress
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Solution Overview
Problem
Conventional semiconductor device package structures with exposed islands face reduced bonding reliability at central parts due to increased heat stress, leading to solder bonding failures during temperature cycles.
Innovation Solution
A semiconductor device configuration with a larger first external connection terminal at the central part of each side and a smaller second external connection terminal outside it, along with an island soldered to the substrate, enhances bonding area and reliability by distributing stress effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the island is soldered to the substrate along with external connection terminals, then thermal resistance is reduced and heat dissipation is improved, but bonding reliability at central parts deteriorates due to increased heat stress
Solution Approach 1:
The patent applies different area sizes to external connection terminals based on their location: larger area terminals at central parts of sides (where heat stress concentrates) and smaller area terminals at corner parts. This local differentiation addresses the heat stress distribution pattern, providing enhanced bonding capacity where needed most while maintaining overall thermal dissipation effectiveness.
Solution Approach 2:
The patent changes the area parameter of external connection terminals based on their position in the package structure. By increasing the area of terminals at central parts of sides, the bonding strength and heat stress resistance are improved in the most vulnerable regions, while corner terminals maintain smaller areas for optimal overall performance.
2Reliability
If external connection terminals at corner parts are made larger, then peeling resistance is improved, but device density deteriorates due to reduced number of terminals
Solution Approach 1:
The patent differentiates terminal areas by location: corner terminals have smaller areas while central terminals have larger areas. This resolves the contradiction by placing the enhanced bonding capacity where heat stress concentrates (central parts) rather than uniformly across all terminals, thereby maintaining device density while improving reliability where needed.
3Strength
If external connection terminals at end parts are made larger, then bending resistance is improved, but device complexity increases
Solution Approach 1:
The patent applies larger terminal areas specifically at central parts of sides where heat stress and bending forces concentrate during temperature cycling. This targeted approach improves bending resistance without uniformly increasing all terminal sizes, thereby avoiding unnecessary device complexity while addressing the specific mechanical stress points.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration extends solder bonding life by reducing stress at the central parts and improving bonding reliability between the package structure and the substrate, even under heat stress conditions.
Implementation Method 1
bonding to a substrate by soldering each of the external connection terminals and the island
Implementation Method 2
a resin molding that seals the semiconductor chip, the island, and the plurality of external connection terminals
Data Source
AI summary
An apparatus provides good bonding between a package structure and a substrate and extended solder bonding life, even under heat stress. Of a lead frame to be used for a package structure having a configuration in which a semiconductor chip, an island of the lead frame, and external connection terminals are sealed with a resin from one surface, and the island and the external connection terminals are exposed on the other surface, the external connection terminals include a first external connection terminal disposed at a central part of each of sides of an outer rim of a semiconductor chip mounting region in which the semiconductor chip is to be mounted and a second external connection terminal outside the first external connection terminal at each of the sides of the outer rim of the semiconductor chip mounting region, wherein the first external connection terminal area exceeds the second external connection terminal's.