Semiconductor Module Terminal Layout for High-Frequency Signal Routing

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Solution Overview

Problem

The multi-chip module's external connection terminals are arranged in a way that makes it difficult to route wires from the substrate surface, leading to signal reflection and reduced reliability due to increased signal delay and waveform disturbance when high-frequency signals pass through through holes.

Innovation Solution

The semiconductor module is configured with connection terminals disposed in a shape of rectangular rings, where the first connection terminal group is positioned on the outer peripheral side and connected directly to the first circuit element on the same surface, while the second connection terminal group is connected via a through hole to the second circuit element on the opposite surface, allowing efficient connection without detouring through the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If connection terminals are arranged in rectangular rings with concentrated disposal for identical functions, then wiring distance to connection destination is reduced, but it becomes difficult to lead out wires from all terminals on the substrate surface

Engineering Contradiction:
Improvewiring distanceVSAvoidwire lead-out ease
Core Design Contradiction:
Length of moving objectVSEase of operation

Solution Approach 1:

The patent utilizes both the front surface and back surface of the substrate to dispose connection terminals. By arranging terminals in multiple rectangular rings on both surfaces, the invention transforms a two-dimensional terminal arrangement problem into a three-dimensional solution, allowing wires to be led out from either surface and reducing the need for through-hole connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If wires pass through through holes to connect terminals, then connection between opposite surface terminals is achieved, but signal reflection occurs and reliability is lowered due to high-frequency signal disturbance

Engineering Contradiction:
Improveconnection flexibilityVSAvoidsignal transmission reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The invention extracts the problematic through-hole connections from the signal path by providing alternative connection paths. Terminals are disposed on both front and back surfaces, allowing signals to be transmitted through surface traces instead of penetrating through holes, thereby eliminating signal reflection and waveform disturbance caused by through-hole transitions.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If wires are routed through through holes, then connection between opposite surfaces is established, but wire length increases causing signal delay

Engineering Contradiction:
Improveconnection capabilityVSAvoidsignal delay
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

By disposing terminals on both the front and back surfaces of the substrate, the invention creates direct surface-level connection paths that eliminate the need for vertical through-hole traversal. This dimensional arrangement significantly shortens the effective wire length for inter-surface connections, reducing signal delay while maintaining full connection capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12027492B2Semiconductor module and semiconductor device
Publication Date: 2024.07.02 AISIN CORP
  • US12027492B2 patent drawing
  • US12027492B2 patent drawing
  • US12027492B2 patent drawing

AI summary

Connection terminals of a semiconductor module are disposed appropriately in accordance with the connection destination of the semiconductor module. A semiconductor module which includes at least one semiconductor element is mounted on a first surface of a main substrate, which has the first surface on which a first circuit element is mounted and a second surface on which a second circuit element is mounted. A plurality of connection terminals include a first connection terminal group composed of a plurality of first connection terminals to be connected to the first circuit element via the main substrate, and a second connection terminal group composed of a plurality of second connection terminals to be connected to the second circuit element via the main substrate. The first connection terminal group is disposed on the outer peripheral side with respect to the second connection terminal group.