Semiconductor Terminal Layout for Solder Fillet Crack Resistance

Solution Overview

Problem

Semiconductor devices face issues with thermal stress-induced cracking in solder fillets due to differing thermal stresses on terminals, leading to reduced bonding strength and reliability when mounted on circuit boards.

Innovation Solution

The semiconductor device design features terminals with varying side surface dimensions and orientations within the sealing resin, allowing for differential solder fillet formation and enhanced thermal stress distribution, along with a coating layer for improved wettability and bonding, and a die pad configuration for heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If solder fillets are formed on all terminals to increase bonding strength, then bonding strength improves, but thermal stress concentration causes cracking in solder fillets

Engineering Contradiction:

Improvebonding strengthVSAvoidcrack resistance

Core Design Contradiction:

StrengthVSReliability

Solution Approach 1:

The patent applies local quality by making solder fillets present only on specific terminals (first and second terminals) rather than all terminals uniformly. This selective placement creates different local bonding characteristics - terminals with solder fillets provide strong bonding while terminals without solder fillets serve as stress relief points, preventing crack propagation throughout the entire terminal array.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent implements asymmetry by creating an uneven distribution of solder fillets across the terminals. Instead of symmetric uniform bonding, the design asymmetrically places solder fillets on specific terminals based on their thermal stress exposure, creating a non-uniform bonding pattern that optimizes both strength and stress distribution.

Inventive Principle:

Principle #4Asymmetry

2Ease of manufacture

If uniform solder fillets are formed on all terminals, then manufacturing simplicity is maintained, but thermal stress distribution becomes uneven causing cracks

Engineering Contradiction:

Improvesolder fillet formationVSAvoidthermal stress resistance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by making solder fillets present only on specific terminals (first and second terminals) rather than all terminals uniformly. This selective placement creates different local bonding characteristics - terminals with solder fillets provide strong bonding while terminals without solder fillets serve as stress relief points, preventing crack propagation throughout the entire terminal array.

Inventive Principle:

Principle #3Local quality

3Strength

If solder fillets are formed on terminals to improve bonding, then bonding strength increases, but thermal stress concentration reduces solder fillet reliability

Engineering Contradiction:

Improvebonding strengthVSAvoidthermal stress

Core Design Contradiction:

StrengthVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of thermal stress into a beneficial design feature by strategically placing solder fillets only on terminals that can withstand thermal stress while leaving other terminals without solder fillets. The terminals without solder fillets act as stress relief zones that absorb and redirect thermal stress away from the bonded terminals, transforming the potential harm into a protective mechanism.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent applies local quality by making solder fillets present only on specific terminals (first and second terminals) rather than all terminals uniformly. This selective placement creates different local bonding characteristics - terminals with solder fillets provide strong bonding while terminals without solder fillets serve as stress relief points, preventing crack propagation throughout the entire terminal array.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS20240297102A1Semiconductor device

Publication Date: 2024.09.05 ROHM CO LTD

AI summary

A semiconductor device includes a plurality of terminals arranged along a first direction, a semiconductor element electrically connected to at least one of the plurality of terminals, and a sealing resin covering a part of each of the plurality of terminals and covering the semiconductor element. Each of the plurality of terminals includes a mount surface exposed from the sealing resin, and a side surface. The plurality of terminals include a first terminal located closest to one end in the first direction of the sealing resin and a second terminal spaced apart from the first terminal. The dimension in the thickness direction of the side surface of the second terminal differs from the dimension in the thickness of the side surface of the first terminal.