Semiconductor Terminating Structure Impurity Gradient
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Solution Overview
Problem
Conventional semiconductor devices face a tradeoff between reducing the resistance of the current path and improving the withstand voltage of the terminating structure, making it difficult to simultaneously achieve both objectives.
Innovation Solution
The semiconductor device incorporates a specific layered structure with varying impurity concentrations and configurations, including an annular second semiconductor layer, a third semiconductor layer positioned further from the surface, and a fourth semiconductor layer that electrically connects them, along with a field plate portion and a super junction structure, to reduce electric field concentration and enhance withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the impurity concentration in the first semiconductor layer is increased to reduce current path resistance, then the resistance decreases, but the withstand voltage of the terminating structure deteriorates
Solution Approach 1:
The patent applies local quality by creating different impurity concentration zones within the first semiconductor layer. The element region maintains high impurity concentration for low resistance, while the terminating region has lower impurity concentration for high withstand voltage. This is achieved through selective ion implantation or diffusion processes that modify impurity distribution in specific areas, allowing each region to optimize its electrical properties independently.
Solution Approach 2:
The patent segments the first semiconductor layer into functionally distinct regions: an element region with high impurity concentration for current conduction, and a terminating region with lower impurity concentration for voltage withstanding. The terminating structure is further segmented into multiple layers (second, third, and fourth semiconductor layers) with progressively varying impurity concentrations, creating a gradient that optimizes both resistance and withstand voltage performance.
2Reliability
If a conventional terminating structure is used to improve withstand voltage, then the withstand voltage improves, but the current path resistance increases
Solution Approach 1:
The terminating structure employs local quality by configuring the second, third, and fourth semiconductor layers with specific impurity concentrations and spatial distributions. The second semiconductor layer has moderate impurity concentration, the third layer has higher concentration, and the fourth layer has the highest concentration. This gradient distribution allows the terminating region to maintain high withstand voltage while the element region beneath it maintains low resistance through its own high impurity concentration.
Solution Approach 2:
The patent resolves the contradiction by transitioning from a two-dimensional planar structure to a three-dimensional layered structure. The multiple semiconductor layers are stacked vertically with different impurity concentrations, creating a depth dimension that allows simultaneous optimization of surface terminating performance and subsurface current conduction. The fourth semiconductor layer extends deeper into the first semiconductor layer, providing electrical connection in the vertical dimension while maintaining the terminating function at the surface.
3Object-generated harmful factors
If the impurity concentration gradient is optimized to reduce current path resistance, then resistance decreases, but electric field concentration at the terminating portion increases
Solution Approach 1:
The patent applies parameter changes by systematically varying the impurity concentration parameter across different semiconductor layers and regions. The second semiconductor layer has a first impurity concentration, the third layer has a second concentration higher than the first, and the fourth layer has a third concentration higher than the second. This controlled parameter gradient modifies the electric field distribution, allowing current path resistance to be reduced through higher impurity concentrations in the element region while preventing excessive electric field concentration at the terminating portion through the graduated concentration profile.
Solution Approach 2:
The terminating structure provides beforehand cushioning by positioning the second, third, and fourth semiconductor layers to create a protective gradient zone before the high electric field region. The fourth semiconductor layer, with its highest impurity concentration, is positioned to electrically connect the second and third layers while being surrounded by the second layer in plan view. This configuration cushions the electric field transitions and prevents sharp concentration peaks that would occur with abrupt impurity concentration changes.
Data Source
AI summary
A semiconductor device includes a first layer of first conductivity type and including an element region where semiconductor elements are to be formed, an annular second layer of second conductivity type formed to include a surface of the first layer, and surrounding the element region in a plan view, a third layer of second conductivity type formed in the first layer and separated more from the surface than the second layer, and sandwiching a portion of the first layer between the second and third layers, a fourth layer of second conductivity type and electrically connecting the second and third layers, and an electrode electrically connected to the fourth layer inside the second layer in the plan view. effective concentration of a second conductivity type impurity included in the second layer is higher than that of the first layer, and lower than that of the third layer.