Semiconductor Termination Structure With Segmented Trenches
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Solution Overview
Problem
Current insulated trench gated Schottky devices face challenges in achieving optimal breakdown voltage and avoiding photolithographic alignment issues as device geometries shrink, while also requiring cost-effective and easily integratable termination structures with design flexibility and equal or better electrical performance.
Innovation Solution
The proposed semiconductor device structure includes a termination structure with a conductive structure electrically isolated by a dielectric layer, featuring a field plate configuration and conductive spacers, which manages electrical field build-up under reverse bias conditions, is scalable for various voltage ranges, and is compatible with existing manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single wide termination trench with polysilicon spacers is used, then the structure is easy to implement and can be formed in a single masking step, but photolithographic alignment issues occur and optimal breakdown voltage cannot be achieved as device geometries shrink
Solution Approach 1:
The termination structure is divided into multiple narrow termination trenches instead of a single wide trench. This segmentation allows each trench to be formed with better photolithographic alignment precision while maintaining the overall termination function. The multiple trenches are spaced apart to avoid alignment issues that occur with a single wide trench structure.
Solution Approach 2:
Different regions of the device are given different trench characteristics. The active region has trenches with specific dimensions and the termination region has multiple narrow trenches with different spacing and dimensions optimized for electrical performance. This local differentiation allows each region to be optimized independently for its specific function while avoiding the alignment problems of uniform wide trenches.
2Area of moving object
If device geometries are shrunk to achieve smaller die size, then power density and system efficiency are improved, but achieving optimal breakdown voltage becomes difficult and alignment issues worsen
Solution Approach 1:
The termination structure uses multiple narrow trenches arranged in a specific spatial pattern rather than a single wide trench. This dimensional arrangement allows the effective termination width to be maintained across shrunk geometries while each individual trench remains narrow enough for precise photolithographic formation, thus maintaining breakdown voltage performance in smaller devices.
Solution Approach 2:
The trench parameters (width, spacing, depth) are specifically optimized for the termination function. Multiple narrow trenches are used with spacing and dimensions that provide the necessary electrical termination performance while being compatible with shrunk device geometries and standard photolithographic process capabilities.
3Reliability
If multiple narrow termination trenches are used instead of a single wide trench, then photolithographic alignment issues are avoided and breakdown voltage performance is improved, but the structure becomes more complex
Solution Approach 1:
The multiple narrow termination trenches are formed using a common masking and etching process, effectively merging the formation of multiple trenches into a single process step. This reduces the overall process complexity despite the increased structural complexity, as the trenches are created simultaneously rather than individually.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides equal or improved electrical performance compared to prior structures, is cost-effective, and offers design flexibility, enhancing the reliability and manufacturing yield of semiconductor devices while maintaining performance across different voltage levels.
Implementation Method 1
a dielectric layer laterally extends to overlie the conductive spacer and the conductive structure within the termination trench
Implementation Method 2
featuring a field plate configuration and conductive spacers, which manages electrical field build-up under reverse bias conditions
Data Source
AI summary
A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.