Semiconductor Test Analysis Device for Defect Root Cause Identification
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Solution Overview
Problem
Analysts face a heavy burden in determining the reason for semiconductor chips being classified as defective due to insufficient support from existing technologies, which fail to effectively analyze test data and identify the root cause of inspection defects.
Innovation Solution
A semiconductor test result analysis device and method that acquires and processes data related to the test process of multiple chips, generating decision trees and graph images to identify key factors influencing test results, thereby reducing analyst workload and improving estimation accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual analysis of test data is performed to determine defective chips, then estimation accuracy can be achieved, but analyst workload becomes excessively heavy
Solution Approach 1:
The system enables self-service analysis by automatically generating decision trees and graph images that allow the data itself to speak. The automated decision tree generation and graph visualization functions enable analysts to obtain insights directly from the data without extensive manual processing, reducing workload while maintaining accuracy.
Solution Approach 2:
The patent replaces manual mechanical analysis processes with automated computer-based systems. The decision tree generation algorithm and graph image processing functions substitute for manual data examination, providing automated support that reduces analyst workload while maintaining estimation accuracy.
2Measurement precision
If comprehensive data analysis is performed to identify root causes, then estimation accuracy improves, but analysis time increases
Solution Approach 1:
The patent segments the complex data analysis task into distinct components: decision tree generation for identifying key factors, graph image generation for visualizing relationships, and graph image processing for extracting insights. This segmentation allows each component to be optimized independently and reduces overall analysis time while maintaining comprehensive accuracy.
Solution Approach 2:
The system performs preliminary actions by pre-generating decision trees and graph images from the data before final analysis. The automated generation of these visual and structural representations in advance provides ready-to-use analysis frameworks that reduce the time needed for final estimation and root cause identification.
3Ease of operation
If detailed graph images are generated for each data item, then visual support for analysis is improved, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by using a single graph image generation system that handles multiple data items and analysis scenarios. The same core functionality generates graph images for different chips, test conditions, and analysis types, reducing the need for separate specialized tools and thereby reducing overall system complexity.
Solution Approach 2:
The system manages complexity by dynamically adjusting graph image parameters such as resolution, detail level, and visualization style based on the specific data being analyzed. This allows the system to provide detailed visual support when needed while using simpler representations for routine analysis, balancing ease of operation with system complexity.
Data Source
AI summary
A condition data acquirer acquires first data of a plurality of items related to a test process of a plurality of semiconductor chips. A test result acquirer acquires second data indicating test results of the plurality of semiconductor chips in the test process. In a region in which a plurality of items of the condition data are arranged on one axis and a plurality of values of the respective items is arranged in a direction orthogonal to the axis, a graph generator generates a graph image in which corresponding values are connected by lines over the plurality of items for each group of a plurality of semiconductor chips having the same test environment. The graph generator changes a form of the lines for each group in the graph image according to a ratio of the semiconductor chips whose test results have been failed in each group.