Multi-Layer Semiconductor Test Circuit Board Design

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Solution Overview

Problem

Conventional circuit boards for semiconductor test face challenges in maintaining power test uniformity when probing multiple devices simultaneously, leading to board warping and increased inductance issues due to mixed layer configurations, which require additional capacitors and complicate manufacturing.

Innovation Solution

A multi-layer circuit board design comprising sub-circuit boards with insulating dielectric layers, where each sub-board is optimized for either power or signal integrity, reducing the length of conductive vias and preventing interference, allowing for a smaller number of physical capacitors and improved flatness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If circuits of power layer and signal layer are formed in a single circuit board in mixed piled arranging manner, then manufacturing process is simplified, but signal conductive via penetrates through power plane causing damage to power integrity and lowering power test uniformity

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidpower test uniformity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The circuit board is divided into multiple sub-circuit boards, with each sub-board dedicated to specific layers (power layers or signal layers). This segmentation prevents signal vias from penetrating power planes while maintaining manufacturing efficiency through modular assembly.

Inventive Principle:

Principle #1Segmentation

2Reliability

If physical capacitors are arranged on upper surface of circuit board to ensure power test uniformity, then power test uniformity is improved, but available area for probes and contacts is reduced

Engineering Contradiction:

Improvepower test uniformityVSAvoidavailable area for probes and contacts

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

By segmenting the circuit board into dedicated power sub-boards and signal sub-boards, power integrity is maintained through proper layer stacking without requiring additional capacitors, thus preserving area for probes and contacts.

Inventive Principle:

Principle #1Segmentation

3Productivity

If circuit board size is increased to accommodate more probes and contacts for probing more devices, then productivity is improved, but board warping and inductance issues worsen

Engineering Contradiction:

Improvenumber of devices probedVSAvoidboard flatness

Core Design Contradiction:

ProductivityVSStability of the object's composition

Solution Approach 1:

The circuit board is divided into multiple smaller sub-circuit boards, each maintaining proper layer stacking and flatness. This segmentation allows the overall system to probe more devices without individual boards experiencing warping or inductance problems.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Instead of increasing the size of a single board, the system transitions to multiple smaller boards stacked and connected vertically, achieving higher device capacity without compromising board flatness or increasing inductance.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

4Ease of operation

If signal conductive via penetrates through power plane, then electrical connection between tester and device is achieved, but power integrity is damaged and inductance increases

Engineering Contradiction:

Improveelectrical connectionVSAvoidpower integrity

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The circuit board is segmented into separate power sub-boards and signal sub-boards with dedicated layer stacking. This prevents signal vias from penetrating power planes, maintaining power integrity while achieving electrical connection through dedicated power conductive vias and inter-subboard connections.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances power test uniformity, reduces the need for physical capacitors, and stabilizes test results by minimizing inductance and board warping, while maintaining the ability to probe multiple devices efficiently without increasing the circuit board size.

Implementation Method 1

a plurality of conductive vias (43) penetrating through the insulating dielectric layer (30), and electrically connected with the upper contact (231) of the first sub-circuit board (20) and the lower contact (432) of the second sub-circuit board (40)

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS11852679B2Circuit board for semiconductor test

Publication Date: 2023.12.26 MPI CORP

AI summary

A circuit board for semiconductor test includes first and second sub-circuit boards, and an insulating dielectric layer therebetween. Each sub-circuit board includes a substrate and circuits including upper and lower contacts. The insulating dielectric layer includes through holes, and connecting conductors disposed therein and electrically connected with the upper and lower contacts of two sub-circuit boards. The circuit board is defined with central and peripheral regions. The lower contacts of the first sub-circuit board in the central region are electrically connected with a probe head. The upper contacts of the second sub-circuit board in the peripheral region are electrically connected with a tester, larger in pitch than the lower contacts of the first sub-circuit board in the central region, and larger in amount than the lower contacts of the first sub-circuit board in the peripheral region. The circuit board has great power test uniformity.