Semiconductor Test Circuit With Leakage Current Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The fabrication of integrated circuits is imperfect, leading to performance variations across wafers and batches, requiring accurate on-chip measurement of semiconductor devices, which typically necessitates multiple pins at the IC boundary, increasing area and system complexity and costs.
Innovation Solution
A circuit with a switching array and a leakage current compensator that allows sequential interconnection and disconnection of semiconductor devices for testing, using a single output pin, and a passive digital-to-analog converter to measure test currents while diverting leakage currents, thereby reducing system complexity and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple pins are used at the IC boundary for calibration purposes, then measurement accuracy is improved, but IC area and system complexity increase
Solution Approach 1:
The patent segments the measurement function by separating the test current path from the leakage current path. The switching array divides multiple semiconductor devices into individually testable units, allowing sequential measurement through a single output pin rather than requiring simultaneous access through multiple pins.
Solution Approach 2:
The leakage current compensator acts as an intermediary element that introduces a compensating current to counterbalance the leakage current. This mediator allows the system to achieve accurate measurements through a single pin by actively canceling out the harmful leakage effects rather than requiring multiple pins to separately measure and compensate.
2Measurement precision
If multiple pins are used at the IC boundary, then measurement accuracy is improved, but IC area increases
Solution Approach 1:
The patent merges multiple measurement functions into a single output pin. By combining the test current measurement and leakage current compensation through the shared output pin, the system eliminates the need for separate pins that would otherwise be required for each measurement function.
Solution Approach 2:
The single output pin serves multiple functions: it carries the test current from the device under test, receives the compensating current from the leakage current compensator, and provides the measurement output. This multi-functional use of a single pin reduces the total pin count and associated IC area.
3Device complexity
If leakage current is not compensated, then system complexity is reduced, but measurement accuracy deteriorates
Solution Approach 1:
The leakage current compensator implements a feedback mechanism where the compensating current is adjusted based on the measured leakage current. The system continuously monitors the leakage effect and applies a counteracting current to maintain measurement accuracy, creating a closed-loop compensation system.
Solution Approach 2:
The patent converts the harmful leakage current into a useful measurement signal by measuring the leakage current and generating a compensating current from it. The previously harmful leakage effect becomes the basis for the compensation mechanism, transforming the problem into a solution.
Data Source
AI summary
An apparatus includes a plurality of semiconductor devices and an electrical input device for applying voltage to the plurality of semiconductor devices. There is a switching array configured to sequentially interconnect the electrical input device to each of the semiconductor devices and disconnect the other semiconductor devices from the electrical input device. The semiconductor device connected to the electrical input device is a device under test that produces a test current and the other semiconductor devices are devices not under test that produce, in the aggregate, a leakage current. There is an output node interconnected to the switching array for enabling the measurement of the test current at the output node. There is also a leakage current compensator connected to the output node and the switching array that is configured to divert the leakage current away from the output node.


