Semiconductor Apparatus Test Loop Control for Pad Count Scaling
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Solution Overview
Problem
The increasing number of pads in semiconductor apparatuses for data input/output operations prolongs test time, limiting the number of devices that can be tested simultaneously due to the limited number of lines for electrical coupling with test equipment.
Innovation Solution
A semiconductor apparatus is designed with an input buffer, data input/output control units, and test loop control units that allow for simultaneous activation during testing, enabling efficient data transfer and latching of test data across multiple pads without increasing test time, even as the number of pads increases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the number of pads is increased to increase data input/output speed and capacity, then the data input/output performance is improved, but the test time is lengthened
Solution Approach 1:
The patent divides the testing function into two independent pathways: a normal operation pathway through data input/output pads and a test pathway through dedicated test pads. This segmentation allows testing to proceed independently of the number of data pads, resolving the contradiction between increasing data capacity and maintaining test time efficiency.
Solution Approach 2:
The test pads serve multiple functions: they can input test data, output test results, and control testing operations. This multi-functionality consolidates the testing process into a separate pathway that does not depend on the number of data pads, allowing the device to maintain fast data input/output performance while keeping test time constant.
2Quantity of substance
If the number of pads is increased to increase data input/output capacity, then the data storage capacity is improved, but the number of semiconductor apparatuses that can be tested simultaneously decreases
Solution Approach 1:
By separating testing functions into dedicated test pads independent of data pads, the patent enables simultaneous testing of multiple semiconductor apparatuses. Each apparatus can be tested through its test pads while data pads handle data input/output operations, increasing the number of apparatuses that can be tested concurrently without sacrificing data capacity.
Solution Approach 2:
The test pads act as intermediary elements that facilitate testing operations independently of the data pads. This intermediary structure allows test equipment to connect to semiconductor apparatuses through dedicated test interfaces, enabling parallel testing of multiple devices while their data pads continue to handle data capacity requirements.
3Device complexity
If the number of lines for electrical coupling with test equipment is limited, then the device complexity is reduced, but the number of semiconductor apparatuses that can be tested simultaneously decreases
Solution Approach 1:
The test pads provide a universal testing interface that can be used across multiple semiconductor apparatuses. By consolidating testing functions into dedicated pads with standardized interfaces, the patent reduces the number of unique coupling lines needed while maintaining the ability to test multiple apparatuses simultaneously through time-division or parallel testing protocols.
Data Source
AI summary
A semiconductor apparatus includes an input buffer configured to buffer and output data inputted from a data input/output pad; a data input control unit configured to transfer data outputted from the input buffer; a data output control unit configured to transfer inputted data to an output buffer; the output buffer configured to buffer data outputted from the data output control unit, and output the buffered data to the data input/output pad; a test data input/output unit configured to latch test inputted data inputted and output test latch data or latch an output of the input buffer and output the test latch data; and a test loop control unit configured to transfer data or the test latch data to the data output control unit.