Semiconductor Test Membrane With Aperture Paths for Micro-Bumps
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Solution Overview
Problem
Existing semiconductor test methods face challenges in accurately testing micro bumps of stacked semiconductor chips without causing damage or misalignment, particularly due to their small size and susceptibility to deformation during testing.
Innovation Solution
A semiconductor test device with a membrane portion featuring aperture patterns and an electrical path portion, made of insulating and conductive materials, is used to contact and test micro bumps, minimizing damage and ensuring precise alignment through elastic and magnetic control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional test methods are used to test micro bumps, then testing can be performed, but micro bumps may be damaged or misaligned due to their small size and susceptibility to deformation
Solution Approach 1:
The patent introduces a membrane portion with aperture patterns as an intermediary between the test probe and the micro bumps. This membrane structure allows electrical contact to be made through the apertures while the membrane itself absorbs mechanical stress and prevents direct damage to the micro bumps, thus resolving the contradiction between achieving reliable electrical connection and preventing micro bump damage
Solution Approach 2:
The membrane portion is designed as a thin, flexible structure that can deform elastically during the testing process. This flexibility allows the membrane to accommodate slight misalignments and absorb mechanical stresses without transmitting damaging forces to the micro bumps, while still maintaining reliable electrical contact through the aperture patterns
2Measurement precision
If precise alignment is required for testing micro bumps, then testing accuracy improves, but alignment difficulty increases due to the small size of micro bumps
Solution Approach 1:
The membrane is divided into multiple aperture patterns that correspond to the arrangement of micro bumps. This segmentation allows each aperture to be independently aligned with its corresponding micro bump, reducing the overall alignment complexity while maintaining high precision through the distributed aperture structure
Solution Approach 2:
The patent utilizes the elastic properties of the membrane and applies controlled magnetic fields to adjust the position and shape of the membrane during alignment. By changing physical parameters such as membrane tension and magnetic field strength, precise alignment can be achieved more easily without requiring extremely tight mechanical tolerances
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device enables reliable electrical connection and testing of micro bumps while preventing damage, allowing for accurate alignment and reducing defects in semiconductor chips.
Implementation Method 1
an electrical connection path is formed from the top to the bottom of each aperture pattern
Implementation Method 2
the electrical path portion may include an elastic matrix made of an elastic material, and at least one of a plurality of conductive particles, a plurality of conductive rods, a plurality of conductive wires, a plurality of conductive balls, or a plurality of conductive flakes may be dispersed in the elastic matrix
Implementation Method 3
The metal thin film portion may be made of at least one of Invar, Super Invar, nickel-iron alloy, nickel-cobalt alloy, nickel-iron-cobalt alloy or nickel
Data Source
AI summary
The present invention relates to a semiconductor test device and a manufacturing method thereof. The semiconductor test device according to an embodiment of the present invention is a semiconductor test device which is interposed between semiconductor memories, or between a semiconductor memory and an interposer, to perform a test of an electrical connection, and may include: a membrane portion comprising a plurality of aperture patterns in a thickness direction; and a holder portion having a hollow region and connected to an edge of the membrane portion, wherein neighboring aperture patterns are insulated from each other and an electrical connection path is formed from a top to a bottom of each aperture pattern.