Semiconductor Test Circuit Multiplexer Single Pin Testing

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Solution Overview

Problem

Conventional methods for testing semiconductor driver ICs, particularly those with a large number of output pins, require expensive multi-channel test equipment that is difficult to manufacture, as they need to match or exceed the number of output pins, leading to production challenges and increased costs.

Innovation Solution

A semiconductor device with a test circuit that allows output signals to be coupled to a single output pin through a multiplexer and flip-flop configuration, enabling sequential or simultaneous coupling of signals to multiple output electrodes, reducing the need for multiple test channels and enabling testing of multiple output pins with a single test pin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional multi-channel test equipment is used to test each output pin individually, then measurement precision is improved, but device complexity and manufacturing cost increase significantly

Engineering Contradiction:
Improveoutput signal testing accuracyVSAvoidtest equipment channel quantity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The test circuit enables a single test channel to perform multiple testing functions by sequentially coupling different output signals to one test pin through multiplexer control, allowing one channel to replace multiple channels while maintaining comprehensive testing capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple output signal testing functions are merged into a single test channel through the multiplexer, which combines multiple signal paths into one unified test interface, reducing the total number of test channels required

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If the number of test channels is increased to match the number of output pins, then measurement precision is improved, but ease of manufacture deteriorates due to probe card production difficulties

Engineering Contradiction:
Improveoutput signal testing accuracyVSAvoidprobe card manufacturing
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

A single test pin is designed to serve multiple testing purposes by sequentially receiving different output signals through multiplexer routing, enabling one probe card connection to test multiple output pins without requiring additional probe elements

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If multi-channel test equipment is used to test a large number of output pins, then measurement precision is improved, but loss of time increases due to sequential testing requirements

Engineering Contradiction:
Improveoutput signal testing accuracyVSAvoidtesting duration
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The testing process uses periodic multiplexer switching to sequentially present different output signals to the single test channel in a systematic cycle, enabling comprehensive testing through repeated periodic sampling of each output signal

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The multiplexer is pre-configured with routing paths that allow rapid sequential switching between different output signals, preparing the signal routing in advance to minimize switching time during the testing process

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7576554B2Semiconductor devices and methods of testing the same
Publication Date: 2009.08.18 SAMSUNG ELECTRONICS CO LTD
  • US7576554B2 patent drawing
  • US7576554B2 patent drawing
  • US7576554B2 patent drawing

AI summary

A semiconductor device may include a plurality of output electrodes configured to provide electrical coupling for a respective plurality of output signals outside the semiconductor device. A signal generator may be configured to generate the plurality of output signals. In addition, a test circuit may be coupled between the signal generator and the plurality of output electrodes. The test circuit may be configured to couple each of the output signals to a respective one of the output electrodes in a first operating mode, and the test circuit may be configured to sequentially couple each one of the output signals to one of the output electrodes in a second operating mode. Related methods are also discussed.