Semiconductor Bonding Pad Structure With Inner-Outer Test Pad Alignment
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Solution Overview
Problem
The existing semiconductor fabrication technology faces challenges in achieving precise alignment of bonding pads between substrates, leading to potential misalignment and improper electric connections or connection failures during the bonding process, making it difficult to detect and exclude circuits with poor bonding conditions.
Innovation Solution
The introduction of test pads, where one serves as an inner pad and the other as an outer pad, surrounding the inner pad, allows for effective detection of bonding conditions by measuring leakage current through leading circuits connected to these test pads, enabling precise alignment and detection of misalignment issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If alignment marks are used to align substrates, then alignment process can be performed, but alignment precision is relatively loose causing misalignment between bonding pads
Solution Approach 1:
The patent creates test pads that are copies of the bonding pads in size, shape, and position. These test pads are formed on the substrate alongside the actual bonding pads through the same fabrication process. By copying the bonding pad geometry exactly, the test pads serve as precise reference markers that maintain the same alignment characteristics as the actual bonding pads, enabling accurate alignment verification without relying on larger, less precise alignment marks
Solution Approach 2:
The patent replaces the mechanical alignment mark system with an electrical measurement system. Instead of relying on physical alignment marks that require optical or mechanical measurement, the invention uses electrical continuity measurements through the test pads to detect misalignment. The alignment verification is performed by measuring resistance or continuity between corresponding test pads on bonded substrates, substituting mechanical alignment verification with electrical field-based detection
2Productivity
If substrates are bonded with loose alignment, then bonding process can proceed, but bonding pads may not be well bonded causing connection failure
Solution Approach 1:
The patent performs preliminary alignment verification by measuring the electrical continuity between test pads before finalizing the bonding process. The test pads are positioned to correspond exactly with the bonding pads, allowing alignment checks to be performed while the substrates are still in the bonding fixture. This preliminary detection enables correction of alignment issues before the bonding is completed, preventing connection failures without requiring rework of the entire bonding process
Solution Approach 2:
The patent implements a feedback mechanism where electrical measurements from the test pads provide real-time information about alignment quality. The measurement system detects misalignment between corresponding test pads on bonded substrates and provides feedback that can trigger alarm signals or indicate which specific bonding locations require correction. This feedback loop enables continuous monitoring and correction of alignment issues during the bonding process, ensuring reliable connections
3Ease of operation
If alignment marks are large relative to bonding pads, then alignment can be performed, but alignment precision becomes loose
Solution Approach 1:
The patent applies local quality by creating test pads at specific locations that correspond to the bonding pads, rather than using large alignment marks across the entire substrate. Each test pad is locally positioned to match the size, shape, and location of its corresponding bonding pad. This localized approach provides high measurement precision at the critical bonding locations without requiring large-scale alignment marks that would reduce precision
Solution Approach 2:
The patent changes the measurement parameter from physical dimension measurement (using large alignment marks) to electrical property measurement (using small test pads). By measuring electrical continuity or resistance between corresponding test pads, the system achieves high precision alignment verification using much smaller features than traditional alignment marks. This parameter change from mechanical to electrical measurement enables precise alignment detection with minimal feature size
Data Source
AI summary
A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.