Semiconductor Test Pad Segmentation for Probe Positioning
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Solution Overview
Problem
In semiconductor wafer acceptance tests, probe sets often slip or shift during contact with test pads, leading to unreliable electrical measurements and inefficient use of limited wafer space, necessitating a real-time monitoring mechanism to ensure accurate positioning and reduce testing risks.
Innovation Solution
A semiconductor device with a first test pad and multiple second test pads, where the second test pads are electrically connected to peripheral portions of the first test pad, allowing for real-time detection of probe set positioning by outputting test signals and analyzing detection statuses to determine the position of the probe application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a probe set is used to contact test pads for electrical measurements, then electrical characteristics can be obtained, but the probe set may slip or shift during contact, leading to positioning errors and measurement failures
Solution Approach 1:
The test pad structure is segmented into a central portion and multiple peripheral portions arranged in different detection directions. This segmentation allows the system to detect probe positioning accuracy by checking contact with peripheral portions while maintaining a stable central contact area, thereby resolving the contradiction between measurement precision and contact stability.
Solution Approach 2:
The patent implements a feedback mechanism where the detection unit monitors whether the probe contacts the peripheral portions of the test pad. Based on this feedback information, the system can determine if the probe is properly positioned and provide real-time positioning accuracy feedback, ensuring both measurement precision and contact stability.
2Measurement precision
If multiple test pads are used to ensure accurate probe positioning detection, then probe position can be monitored, but the area occupied on the wafer increases, reducing available testing area
Solution Approach 1:
The patent applies local quality by strategically placing peripheral portions only at specific locations around the central test pad, rather than using multiple separate test pads. This allows position detection functionality to be integrated into a compact structure, maintaining detection accuracy while minimizing the area occupied on the wafer.
Solution Approach 2:
The invention merges the functions of multiple test pads into a single integrated test pad structure with a central portion and peripheral portions. This consolidation achieves the same position detection capability as multiple separate pads while occupying less wafer area, thus resolving the contradiction between detection accuracy and area efficiency.
3Ease of manufacture
If a simple test pad structure is used, then manufacturing is easier, but real-time probe positioning detection capability is lost
Solution Approach 1:
The test pad is segmented into a central portion and peripheral portions that can be fabricated using standard photolithography and etching processes. This segmentation approach maintains ease of manufacture while enabling real-time position detection through the peripheral portions' strategic placement in different detection directions.
Solution Approach 2:
The test pad structure serves multiple functions: the central portion provides stable electrical contact while the peripheral portions enable position detection in multiple directions. This multi-functionality is achieved within a single fabricated structure, maintaining manufacturing simplicity while adding detection capability.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a first test pad and a plurality of second test pads. The first test pad includes a central portion and a plurality of peripheral portions. The plurality of peripheral portions are disposed adjacent to edges of the central portion. The plurality of peripheral portions are not in contact with each other and with the central portion. The first test pad has a plurality of detection directions, and at least one of the plurality of peripheral portions is disposed in one of the plurality of detection directions. Each of the plurality of second test pads is electrically connected to one of the plurality of peripheral portions through a first connection trace.