Semiconductor Test Signal Line Segmentation
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Solution Overview
Problem
Semiconductor devices with test-mode signal lines made of high-resistance materials are susceptible to transition noise from adjacent normal signal lines, leading to potential fluctuations that can cause erroneous operations during normal or test modes, and existing solutions complicate layout design and signal extraction.
Innovation Solution
A semiconductor device with a signal generator and a signal line having a high-resistance portion and a low-resistance portion, where a latch circuit is inserted in the low-resistance portion to latch the test-mode signal at a specified timing, reducing potential fluctuations and preventing logical inversions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the test-mode signal line is made of high-resistance material to reduce noise coupling, then the signal line is more susceptible to transition noise from adjacent normal signal lines, but using low-resistance material reduces noise susceptibility while increasing power consumption and signal integrity issues
Solution Approach 1:
The signal line is divided into two segments with different resistance characteristics: a first portion made of high-resistance material (tungsten) for reduced noise coupling, and a second portion made of low-resistance material (aluminum) for better signal integrity and lower power consumption. This segmentation allows each portion to optimize for its specific functional requirements.
Solution Approach 2:
Different portions of the signal line are assigned different material properties according to their specific needs. The first portion uses high-resistance material where noise susceptibility is the primary concern, while the second portion uses low-resistance material where signal integrity and drive capability are more important. This local differentiation resolves the contradiction between noise immunity and signal quality.
2Device complexity
If the test-mode signal line is disposed adjacent to normal signal lines to simplify layout, then transition noise from normal signal lines couples into the test-mode signal line, but separating them reduces noise coupling while increasing layout complexity
Solution Approach 1:
The signal line is segmented into high-resistance and low-resistance portions, allowing the line to maintain adjacency to normal signal lines for layout simplicity while the high-resistance first portion provides noise immunity. This segmentation enables the line to be placed close to noisy normal signal lines without suffering from excessive noise coupling.
Solution Approach 2:
The high-resistance first portion acts as an intermediary between the test-mode signal generator and the rest of the signal line. It provides galvanic isolation and noise filtering, allowing the test-mode signal line to be disposed adjacent to normal signal lines while protecting against transition noise coupling.
3Loss of energy
If the test-mode signal line is made of high-resistance material to reduce power consumption, then the signal line becomes more susceptible to noise, but using low-resistance material reduces noise susceptibility while increasing power consumption
Solution Approach 1:
The signal line is divided into high-resistance and low-resistance portions. The high-resistance first portion reduces power consumption by minimizing leakage current, while the low-resistance second portion ensures good signal drive capability and reduces noise susceptibility in the critical region near the test execution circuit.
Solution Approach 2:
Different resistance characteristics are applied locally to different portions of the signal line. The first portion uses high-resistance material where power consumption is the primary concern, while the second portion uses low-resistance material where noise immunity and signal drive capability are more important, thus resolving the contradiction between power saving and noise susceptibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The latch circuit effectively suppresses potential fluctuations and logical inversions, preventing erroneous operations and simplifying layout design by allowing test-mode signal lines to be disposed adjacent to normal signal lines without increasing design complexity.
Implementation Method 1
a latch circuit inserted in the second portion to latch the specific signal at a timing specified by the timing signal
Implementation Method 2
a first portion 203a which is made of a high-resistance material, such as tungsten
Implementation Method 3
an equivalent circuit including a coupling capacitance between the test-mode signal line and the normal signal line
Data Source
AI summary
A mode decode/latch circuit decodes an input signal based on a latch timing signal to output a test mode signal to a test execution circuit. Test mode signal line includes a high-resistance portion extending from the mode decode/latch circuit toward the vicinity of the test execution circuit and a low-resistance portion connecting together the distal end of the high-resistance portion and the input of the test execution circuit. A latch circuit for latching the test mode signal based on the latch timing signal is inserted in the low-resistance portion.