Semiconductor Test Structures for Corner Rounding Quantification
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Solution Overview
Problem
Manufacturing-induced corner rounding in semiconductor devices leads to dimensional variations, affecting the performance of transistors and integrated circuit devices by creating non-uniform electric fields and deviating from designed dimensions.
Innovation Solution
Forming test structures on a semiconducting substrate with varying physical dimensions, including those with manufacturing-induced corner rounding, and performing electrical tests to analyze the impact of corner rounding on device performance, using reference structures to quantify and mitigate these effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography systems are used to form semiconductor features, then manufacturing capability is achieved, but manufacturing-induced corner rounding occurs leading to dimensional variations
Solution Approach 1:
The patent applies preliminary action by forming test structures with known corner rounding characteristics before production manufacturing. These test structures are created in advance to establish baseline data that will be used to compensate for corner rounding effects in subsequent production devices, allowing the manufacturing process to proceed while maintaining dimensional accuracy through pre-established reference data
Solution Approach 2:
The patent uses copying by creating reference test structures that replicate the corner rounding effects expected in production devices. These test structures serve as copies or models that exhibit the same manufacturing-induced corner rounding, allowing designers to study and compensate for the effects without affecting actual production device quality
2Speed
If device dimensions are reduced to increase operating speed, then transistor speed increases, but corner rounding effects become more significant
Solution Approach 1:
The patent implements feedback by measuring the actual corner rounding in test structures and using this measured data to adjust and compensate for dimensional variations in production device design. The test results provide feedback information that allows designers to modify layout dimensions or other parameters to achieve the intended functional dimensions despite corner rounding
Solution Approach 2:
The patent applies parameter changes by modifying design parameters such as layout dimensions, spacing, or other geometric parameters to compensate for the expected corner rounding effects. By changing these parameters in the design stage based on test data, the final manufactured devices achieve the desired dimensional accuracy and performance despite the rounding that occurs during manufacturing
3Measurement precision
If test structures with varying dimensions are formed to quantify corner rounding, then measurement accuracy improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the test structures into multiple distinct structures, each with specific dimensional characteristics. This segmentation allows different aspects of corner rounding to be measured independently - some structures test width variations, others test area variations, and others test specific geometric parameters, enabling comprehensive quantification through multiple specialized measurements rather than one complex measurement
Data Source
AI summary
The present invention is directed to methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing same. In one illustrative embodiment, the method includes forming a plurality of test structures on a semiconducting substrate, each of the test structures having at least one physical dimension that varies relative to the other of the plurality of test structures, at least some of the test structures exhibiting at least some degree of manufacturing-induced corner rounding, forming at least one reference test structure, performing at least one electrical test on the plurality of test structures and on the reference test structure to thereby produce electrical test results, and analyzing the test results to determine an impact of the manufacturing-induced corner rounding on the performance of the plurality of test structures.