Semiconductor Test Structure for Stable VGAA Word Line Measurement

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Solution Overview

Problem

The narrow space between isolated word lines in vertical gate all around transistors (VGAA) makes them prone to damage during electrical property measurements, and existing methods lack efficient ways to stabilize and facilitate such measurements.

Innovation Solution

A semiconductor structure is designed with pillars spaced by first and second trenches, where conductive structures are formed below adjacent second trenches, and dielectric layers are stacked to isolate and protect the word line structure, allowing for stable electrical property measurements through a single measurement point.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If vertical gate all around transistor structure is adopted to reduce memory dimension, then integration and performance are improved, but word line structure becomes narrow and easily damaged during measurement

Engineering Contradiction:
Improveintegration and performanceVSAvoidword line structure stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by introducing protective structures (dielectric layers and support structures) around the word line structure before measurement processes. These protective elements cushion and protect the narrow word line from mechanical damage during subsequent measurement operations, resolving the contradiction between achieving high integration and maintaining structural reliability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent uses intermediary structures such as dielectric layers and isolation structures that mediate between the narrow word line structure and external measurement equipment. These intermediaries protect the vulnerable word line while allowing electrical measurements to proceed, thus maintaining both integration benefits and measurement reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If word lines are isolated from each other in VGAA transistor, then vertical gate all around structure is achieved, but measurement damage risk increases

Engineering Contradiction:
Improvetransistor structure efficiencyVSAvoidmeasurement damage
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent employs thin film dielectric layers that conformally coat the isolated word line structures. These thin films provide protective coverage while maintaining the isolated architecture of the VGAA transistor, preventing measurement damage without compromising the structural efficiency needed for high productivity.

Inventive Principle:
Principle #30Flexible shells and thin films

3Volume of moving object

If narrow word line structure is used in VGAA, then memory dimension is reduced, but structural damage during measurement occurs

Engineering Contradiction:
Improvememory dimensionVSAvoidword line structure strength
Core Design Contradiction:
Volume of moving objectVSStrength

Solution Approach 1:

The patent creates composite structures by combining the narrow word line material with protective dielectric materials and support structures. This composite approach maintains the small memory dimension achieved through narrow word lines while adding protective layers that significantly enhance structural strength and prevent measurement-induced damage.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS12610811B2Semiconductor structure, test structure, manufacturing method and test method
Publication Date: 2026.04.21 CHANGXIN MEMORY TECH INC
  • US12610811B2 patent drawing
  • US12610811B2 patent drawing
  • US12610811B2 patent drawing

AI summary

Provided is a semiconductor structure, a test structure, a manufacturing method and a test method. The semiconductor structure includes a substrate, which includes multiple pillars spaced along a first direction by first trenches; second trenches formed at opposite sides along a second direction of each of the pillars; target conductive structures extending along the second direction in the substrate directly below adjacent second trenches; and a first dielectric layer, a conductive layer and a second dielectric layer sequentially stacked in the first trenches and the second trenches. A depth of the first trenches is greater than that of the second trenches. The first direction intersects the second direction.