Semiconductor Test-Voltage Generation Circuit Design
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Solution Overview
Problem
In high-integration DRAM circuits, the precharge potential for bit lines becomes unstable due to increased number of bit lines, and existing solutions for test operations require separate voltage generation circuits, leading to increased chip area.
Innovation Solution
A semiconductor device design with a larger number of ordinary-voltage generation circuits compared to test-voltage generation circuits, where ordinary-voltage generation circuits are distributed equidistantly and the test-voltage generation circuit is adjacent to one ordinary-voltage generation circuit, minimizing chip area while stabilizing the precharge potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of bit lines increases to achieve high circuit integration, then circuit integration is improved, but the precharge potential becomes unstable
Solution Approach 1:
The voltage generation function is segmented into multiple ordinary-voltage generation circuits distributed across the chip. Each circuit independently supplies precharge voltage to local bit lines, ensuring stable voltage supply even as the total number of bit lines increases due to high circuit integration.
2Adaptability or versatility
If separate voltage generation circuits are provided for test operations, then test operation functionality is improved, but chip area increases
Solution Approach 1:
The ordinary-voltage generation circuits are designed to serve dual purposes: supplying precharge voltage during normal operations and providing test voltages during test operations. This multi-functionality eliminates the need for separate dedicated test voltage generation circuits, thereby preventing chip area increase while maintaining full test operation capability.
Solution Approach 2:
The test voltage generation capability is merged into the existing ordinary-voltage generation circuits. By combining these functions, the patent avoids duplicating voltage generation hardware, thus minimizing chip area occupation while ensuring both normal and test operations can be performed.
3Reliability
If multiple power supply circuits are arranged to stably supply ordinary voltage, then voltage stability is improved, but chip area considerably increases
Solution Approach 1:
Each power supply circuit is designed with multi-functionality, containing both ordinary-voltage generation circuits for normal operation and integrated test-voltage generation capability. This allows a smaller number of power supply circuits to achieve voltage stability while avoiding the need for additional dedicated test circuits that would increase chip area.
Data Source
AI summary
A semiconductor device includes an internal power supply line, a first power supply circuit, and second power supply circuits. The first power supply circuit includes an ordinary-voltage generation circuit supplying an ordinary voltage to the internal power supply line during an ordinary operation, and a test-voltage generation circuit supplying a test voltage to the internal power supply line during a test operation. Each of the second power supply circuits includes only an ordinary-voltage generation circuit. The number of ordinary-voltage generation circuits is thereby larger than the number of test-voltage generation circuits. Therefore, the ordinary voltage such as the precharge potential can be stably supplied to the internal power supply line while suppressing an increase in chip area.