Wafer Form Semiconductor Test Apparatus for Breakdown Voltage
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Solution Overview
Problem
Existing methods for conducting breakdown voltage tests on semiconductor devices require them to be in chip form, leading to complex and large apparatuses, whereas conducting tests in wafer form would simplify simultaneous testing of multiple devices.
Innovation Solution
A semiconductor test apparatus with a stage, probe card, pressurizing wall, detector, and controller that controls spacing and air pressure to suppress discharge during high-voltage measurements on wafers, allowing for breakdown voltage testing of semiconductor devices in their wafer form.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If breakdown voltage test is conducted on semiconductor devices in chip form, then discharge in terminal portion can be suppressed, but apparatus becomes complex and increases in size
Solution Approach 1:
An insulator is introduced as an intermediary component between the probe and the terminal portion of the semiconductor device. The insulator serves as a mediator that suppresses discharge in the terminal portion while enabling the test to be conducted on wafer-form devices, thereby avoiding the complexity of chip-form testing apparatus
2Object-affected harmful factors
If breakdown voltage test is conducted on semiconductor devices in chip form, then discharge can be suppressed, but testing multiple devices simultaneously becomes difficult
Solution Approach 1:
The test apparatus is designed with universal functionality to handle multiple semiconductor devices in wafer form simultaneously. The insulator structure and probe configuration enable discharge suppression across all devices in the wafer, allowing parallel testing of multiple devices without requiring individual chip-form processing
3Productivity
If breakdown voltage test is conducted on semiconductor devices in wafer form, then simultaneous testing of multiple devices is enabled, but discharge control in terminal portion becomes problematic
Solution Approach 1:
The insulator is positioned specifically at the terminal portion of each semiconductor device in the wafer, providing localized discharge suppression exactly where needed. This local quality approach allows simultaneous testing of multiple devices while maintaining discharge control at the critical terminal regions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient and simultaneous breakdown voltage testing of semiconductor devices in wafer form, suppressing discharge and maintaining surface integrity, particularly effective for SiC devices prone to discharge at high voltages.
Implementation Method 1
a tube to force air into the opening
Implementation Method 2
a detector to detect first spacing between a tip of the probe and the mark
Data Source
AI summary
A semiconductor test apparatus according to the present disclosure includes: a stage on which a wafer is to be mounted; a pressurizing wall disposed on a surface of a probe card opposing the stage, extending toward the stage, and having an opening; a mark disposed on a lower surface of the pressurizing wall opposing the stage; a probe disposed in the opening; an air tube to force air into the opening; a detector to detect first spacing between a tip of the probe and the mark; and a controller to control second spacing between the wafer and the lower surface of the pressurizing wall based on the first spacing, wherein, when an electrical property of each of chips of the wafer is measured, the second spacing is controlled to be predetermined spacing by the controller, and the air is forced into the opening through the air tube.