Semiconductor Element Testing via Removable Redistribution Layer
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Solution Overview
Problem
Conventional semiconductor testing methods require costly, finely manufactured probe cards with close probe spacing, which are prone to contamination and maintenance issues, especially for mini and micro LED products with small spacings, leading to increased production costs and inefficiencies.
Innovation Solution
A method utilizing a redistribution layer formed via a yellow light process, allowing probes to contact the layer instead of the semiconductor element, with the layer being removable by dry, wet, or mechanical grinding, enabling the use of cost-effective probe cards and allowing multiple elements to be tested with a single set of probes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a probe card with smaller probe spacing is used to test mini and micro LED products, then the testing capability for small-spaced semiconductor elements is improved, but the manufacturing cost and maintenance cost of the probe card increase significantly
Solution Approach 1:
The patent introduces a redistribution layer as an intermediary between the semiconductor element and the probe card. This layer has larger pitch than the original metal pads, allowing standard probe cards to test mini and micro LED products without requiring costly custom probe cards with small probe spacing. The redistribution layer converts the small-pitch element array into a larger-pitch test interface.
Solution Approach 2:
The patent adds a vertical dimension by forming a redistribution layer on top of the semiconductor element surface. This third-dimensional approach allows the test interface to be decoupled from the element pitch, enabling standard probe cards to access elements through the redistributed connections rather than requiring direct contact at element pitch.
2Adaptability or versatility
If a probe card with smaller probe spacing is used, then the testing capability for mini and micro LED products is improved, but the probes are prone to contamination and require frequent cleaning or maintenance
Solution Approach 1:
The redistribution layer serves as a mediator that protects the original metal pads from direct probe contact. Probes contact the redistribution layer instead of the element pads, reducing contamination risk to the critical element interfaces while maintaining testing capability for mini and micro LED products.
3Productivity
If multiple semiconductor elements are tested simultaneously with closely spaced probes, then the testing speed is improved, but the probe card cost and complexity increase
Solution Approach 1:
The patent creates copied test interfaces through the redistribution layer, where multiple element connections are remapped to larger-spaced probe contact points. This allows parallel testing of multiple elements using standard probe card pitches, achieving high throughput without requiring expensive custom high-density probe cards.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs by using less expensive probe cards, improves testing speed, and prevents test probe marks on semiconductor elements, while maintaining high test efficiency and yield rates, especially for mini and micro LED products.
Implementation Method 1
using a yellow light process to form a redistribution layer on the semiconductor element to be tested
Implementation Method 2
the redistribution layer is removed by a dry, wet or mechanical grinding process
Data Source
AI summary
Disclosed is a method for testing a semiconductor element. The method comprises forming at least one redistribution layer on a chip, utilizing the at least one redistribution layer to test an array of semiconductor elements on the chip, and removing the at least one redistribution layer from the chip, wherein the length of each semiconductor element is between 2-150 μm and the width of each semiconductor element is between 2-150 μm.


