Semiconductor Structure Layout for Thick-Metal Warpage Control
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Solution Overview
Problem
The fabrication of semiconductor devices, particularly in stacked semiconductor structures, is hindered by warpage issues during the manufacturing process, which can lead to poor yield and quality due to the sensitivity of thick-metal layers with high modulus and thickness.
Innovation Solution
A method is employed to modify the thick-metal density range to constrain warpage within a target range by adjusting the distribution density of metal patterns, incorporating dummy patterns to achieve a desirable pattern density, and optionally modifying the thickness of dielectric layers to stabilize the structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If thick-metal layers with high modulus and thickness are used in semiconductor structures, then structural strength and stability are improved, but warpage control deteriorates leading to poor yield and quality
Solution Approach 1:
The patent applies local quality by introducing dummy metal patterns in specific regions where additional mass is needed for warpage compensation, while maintaining the original functional metal patterns only where electrical connectivity is required. This localized addition of metal density allows differential warpage control across different areas of the substrate, compensating for the high modulus and thickness of functional metal layers without compromising overall structural strength.
Solution Approach 2:
The patent employs parameter changes by systematically varying the density, distribution, and geometry of dummy metal patterns to optimize warpage control. By adjusting parameters such as metal pattern spacing, dummy pattern size, and metal layer thickness in specific regions, the patent achieves precise control over thermal expansion and stress distribution, thereby managing warpage while preserving the structural integrity provided by thick-metal layers with high modulus.
2Manufacturing precision
If dummy patterns are added to control warpage, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the substrate into distinct functional regions and dummy pattern regions. Dummy metal patterns are segregated into specific areas where they serve solely for warpage compensation, while functional metal patterns are concentrated in regions required for electrical connectivity. This spatial segmentation allows the fabrication process to handle different pattern types independently, reducing overall process complexity despite the increased total pattern count.
Solution Approach 2:
The patent uses copying by creating repetitive dummy metal patterns that replicate the structural characteristics of functional metal patterns without providing electrical connectivity. These copied patterns are generated using the same fabrication processes and material deposition techniques as functional patterns, allowing standardization of the manufacturing process. The dummy patterns serve as non-functional copies that compensate for warpage while maintaining process simplicity through pattern repetition.
Data Source
AI summary
A method of fabricating a semiconductor structure provided herein includes providing a thick-metal density range for a model structure, wherein the model structure includes a wafer substrate, and layers of metal patterns stacking on the wafer substrate; modifying the thick-metal density range to constrain a warpage range of the model structure toward a target range of warpage; and fabricating the semiconductor structure by forming the layers of metal patterns on the wafer substrate, wherein a thick-metal layer among the layers of metal patterns is formed based on the modified thick-metal density range, and a thickness of the thick-metal layer is twice or more of a thickness of one of the layers of metal patterns next to the thick-metal layer. A semiconductor structure fabricating by using the above method is further provided.