Semiconductor Switching Layout With Thin-Wire Bonding Area Reduction

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Solution Overview

Problem

The existing semiconductor devices, such as IGBTs and MOSFETs, are limited in size reduction due to the large bonding area required for thick wires used in conventional wedge bonding methods, which restricts the miniaturization of power chips.

Innovation Solution

The use of thin silver or gold wires with diameters of 40 μm or less connects silicon-based IGBTs and wide bandgap semiconductor MOSFETs, employing the ball bonding method to reduce the bonding area to micrometer scale, allowing for a more compact design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thick wires (200-400 μm diameter) made of aluminum are used for connecting IGBTs and MOSFETs, then current density requirements are met, but the bonding area becomes large (millimeter scale) which prevents size reduction of the semiconductor device

Engineering Contradiction:
Improvecurrent densityVSAvoidbonding area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the single thick wire connection into multiple thin wire connections. Instead of using one thick aluminum wire (200-400 μm) that requires large bonding area, the invention uses multiple thin wires (40 μm or less diameter) made of silver or gold, each carrying a portion of the current. This segmentation allows the total bonding area to be reduced from millimeter scale to micrometer scale while maintaining the required current density through the combined effect of multiple wires.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the material parameter from aluminum to silver or gold, and the diameter parameter from 200-400 μm to 40 μm or less. Silver and gold have higher electrical conductivity than aluminum, compensating for the reduced wire diameter. This parameter change enables thin wires to carry sufficient current density while requiring minimal bonding area, thus resolving the contradiction between current density requirements and bonding area size.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If the bonding area is reduced to enable device miniaturization, then the size of the semiconductor device is reduced, but the current carrying capacity may be compromised

Engineering Contradiction:
Improvebonding areaVSAvoidcurrent carrying capacity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The current carrying function is segmented across multiple thin wires rather than relying on a single thick wire. Each thin wire (40 μm or less diameter) carries a fraction of the total current, and the cumulative current capacity of all thin wires equals or exceeds that of the conventional thick wire. This segmentation enables small bonding area while maintaining sufficient current carrying capacity through the collective contribution of multiple wires.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material strategy by using silver or gold (materials with superior electrical conductivity) in thin wire form. The high conductivity of these materials compensates for the small cross-sectional area, enabling thin wires to achieve current carrying capacity comparable to or greater than thick aluminum wires. This material substitution allows bonding area reduction without compromising current carrying capacity.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20240186222A1Semiconductor device
Publication Date: 2024.06.06 MITSUBISHI ELECTRIC CORP
  • US20240186222A1 patent drawing
  • US20240186222A1 patent drawing
  • US20240186222A1 patent drawing

AI summary

An object is to provide a technique capable of reducing in the size of a semiconductor device. A semiconductor device includes a second semiconductor switching element having a rectangular shape with a long side facing a first semiconductor switching element in plan view, having an area smaller than that of the first semiconductor switching element in plan view, and composed of a wide bandgap semiconductor, and a plurality of first wires connecting the first semiconductor switching element and the second semiconductor switching element, being 40 μm or less in diameter, and composed of silver or gold.