Semiconductor Device With Thinner Diode Layer For Low Forward Voltage
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Solution Overview
Problem
The existing semiconductor devices with integrated transistors and Schottky barrier diodes face challenges in achieving optimal withstand voltage and reducing forward voltage, as the thickness of the n-type semiconductor layer is uniform across both areas, leading to increased DC resistance and higher forward voltage in the Schottky barrier diode.
Innovation Solution
The semiconductor device is designed with a thinner n-type semiconductor layer in the Schottky barrier diode area compared to the transistor area, optimizing the thickness in both regions to ensure withstand voltage while reducing the DC resistance and forward voltage, with the semiconductor layer in the diode area being 1 μm or more thinner than in the transistor area, and the thickness in the diode area being 2.5 μm or more to ensure minimum withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the thickness of the n-type semiconductor layer is increased to ensure withstand voltage of the transistor, then the transistor's withstand voltage is improved, but the DC resistance of the Schottky barrier diode increases and the forward voltage increases
Solution Approach 1:
The patent applies local quality by creating different thicknesses of the n-type semiconductor layer in different functional areas: a first thickness in the transistor area to ensure withstand voltage, and a second (thinner) thickness in the Schottky barrier diode area to reduce DC resistance and forward voltage. This spatial differentiation of material properties resolves the contradiction between transistor reliability and diode performance.
Solution Approach 2:
The patent segments the semiconductor layer into distinct thickness zones corresponding to different device functions. The semiconductor layer is divided into a first region (transistor area) with greater thickness and a second region (diode area) with lesser thickness, allowing each segment to be optimized independently for its specific electrical requirements.
2Ease of manufacture
If the thickness of the n-type semiconductor layer is uniform across both transistor and Schottky barrier diode areas, then the manufacturing process is simplified, but the Schottky barrier diode exhibits increased DC resistance and higher forward voltage
Solution Approach 1:
The patent implements local quality by specifying that the n-type semiconductor layer has a first thickness in the transistor area and a second thickness in the Schottky barrier diode area, where the second thickness is less than the first thickness. This localized variation optimizes electrical performance while maintaining manufacturability through controlled epitaxial growth processes.
Data Source
AI summary
A semiconductor device capable of ensuring a withstand voltage of a transistor and reducing a forward voltage of a Schottky barrier diode in a package with the transistor and the Schottky barrier diode formed on chip, and a semiconductor package formed by a resin package covering the semiconductor device are provided. The semiconductor device 1 includes a semiconductor layer 22, a transistor area D formed on the semiconductor layer 22 and constituting the transistor 11, and a diode area C formed on the semiconductor layer 22 and constituting the Schottky barrier diode 10. The semiconductor layer 22 in the diode area C is thinner than the semiconductor layer 22 in the transistor area D.