Semiconductor Device Third Region Impurity Ratio
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Solution Overview
Problem
In semiconductor devices, achieving stable breakdown voltage characteristics is hindered by high contact resistance at the electrode interface, particularly in voltage withstanding structures like the RESURF structure, where reducing contact resistance is crucial for improving breakdown voltage.
Innovation Solution
A semiconductor device design incorporating a third semiconductor region with a specific impurity concentration ratio of n-type and p-type impurities, where the concentration of n-type impurity (D1) is lower than the p-type impurity (D2), ensuring 1 < D2/D1 < 3, which reduces contact resistance and enhances breakdown voltage stability by forming a shallow level and minimizing sheet resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage withstanding structure (RESURF structure) is provided to improve breakdown voltage, then breakdown voltage characteristics are improved, but contact resistance at the electrode interface increases
Solution Approach 1:
The patent applies local quality by creating a third semiconductor region with a specific impurity concentration ratio (1 < D2/D1 < 3) localized at the electrode contact area. This region has different impurity characteristics than the surrounding RESURF structure, specifically optimized to reduce contact resistance while maintaining the voltage withstanding properties of the overall structure.
Solution Approach 2:
The patent changes the impurity concentration parameters by introducing a third semiconductor region with controlled n-type and p-type impurity concentrations. The ratio constraint (1 < D2/D1 < 3) defines a specific parameter range that optimizes both contact resistance and breakdown voltage characteristics simultaneously.
2Object-affected harmful factors
If impurity concentration is increased to reduce sheet resistance, then contact resistance decreases, but breakdown voltage characteristics deteriorate
Solution Approach 1:
The third semiconductor region is localized specifically at the electrode contact area, allowing impurity concentration optimization for low contact resistance only where needed, while the broader RESURF structure maintains its breakdown voltage characteristics.
Solution Approach 2:
The patent introduces a controlled impurity concentration ratio parameter (D2/D1 between 1 and 3) that balances sheet resistance reduction with breakdown voltage maintenance, avoiding the extremes of either very high or very low impurity concentrations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reduced contact resistance and optimized impurity concentration ratio lead to stable breakdown voltage characteristics by uniformly distributing the electric field and reducing local electric field concentrations, thereby improving the overall performance of the semiconductor device.
Implementation Method 1
The third semiconductor region contains a first impurity of the first conductivity type and a second impurity of the second conductivity type, and satisfies 1 < D2/D1 < 3... forming a shallow level and minimizing sheet resistance
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, and a first electrode. The first semiconductor region is of a first conductivity type. The second semiconductor region is provided on the first semiconductor region, and is of a second conductivity type. The third semiconductor region is provided on the second semiconductor region, and is of the second conductivity type. The third semiconductor region contains a first impurity of the first conductivity type and a second impurity of the second conductivity type, and satisfies 1<D2/D1<3, where D1 is a first concentration of the first impurity, and D2 is a second concentration of the second impurity. The first electrode is provided on the first, second, and third semiconductor regions. The first electrode is in contact with the second and third semiconductor regions.