Semiconductor Through-Contact Layout for Backside Wiring Space

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Solution Overview

Problem

As semiconductor devices become more highly integrated, the limited space on the front side of the substrate for forming wirings poses a challenge for efficient signal transmission and power supply.

Innovation Solution

The semiconductor device incorporates an active pattern and a gate structure on a substrate, with channels extending through the gate structure and a through contact that spans the substrate and active pattern, allowing for wiring on both the front and back sides of the substrate and reducing power loss by minimizing interfacial resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If wirings are formed only on the front side of the substrate, then the structure is simple, but the wiring space is insufficient for highly integrated semiconductor devices

Engineering Contradiction:
Improvewiring spaceVSAvoidstructure complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent utilizes the back side of the substrate as an additional dimension for wiring formation. By forming lower wirings on the back side and upper wirings on the front side, the available space for routing electrical signals is effectively doubled, resolving the space constraint without significantly increasing structural complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The wiring system is segmented into multiple layers: lower wirings on the back side, through contacts penetrating the substrate, and upper wirings on the front side. This segmentation allows different wiring functions to be distributed across different spatial zones, increasing overall wiring capacity

Inventive Principle:
Principle #1Segmentation

2Reliability

If channels are used for signal transmission through the substrate, then electrical connection is achieved, but power loss increases due to resistance

Engineering Contradiction:
Improveelectrical connectionVSAvoidpower loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts the signal transmission function from the channel structure by providing dedicated through contacts that bypass the channel region. These through contacts are formed separately and directly connect lower and upper wirings, eliminating the need for signals to traverse through the channel and reducing resistive power loss

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Through contacts serve as intermediary elements that mediate the electrical connection between lower wirings on the back side and upper wirings on the front side. These dedicated conductive paths provide low-resistance connections without involving the active channel structures, thereby reducing power loss

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If through contact is formed with multiple materials, then electrical connection is achieved, but resistance increases at material interfaces

Engineering Contradiction:
Improveelectrical connectionVSAvoidresistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The through contact is formed as a homogeneous structure using a single material throughout its entire length, from the back side to the front side of the substrate. This homogeneity eliminates material interfaces within the through contact, thereby eliminating interfacial resistance and associated power loss while maintaining reliable electrical connection

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentEP4495985A1Semiconductor devices
Publication Date: 2025.01.22 SAMSUNG ELECTRONICS CO LTD
  • EP4495985A1 patent drawingFigure 1
  • EP4495985A1 patent drawingFigure 2
  • EP4495985A1 patent drawingFigure 3

AI summary

A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate; a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction; channels spaced apart from each other in a vertical direction, each of the channels extending through the gate structure; a through contact extending through the substrate and the active pattern in the vertical direction, an upper portion and a lower portion of the through contact connected to each other and formed of the same material; a lower wiring on a back side of the substrate, the lower wiring electrically connected to the through contact; and an upper wiring disposed on a front side of the substrate, the upper wiring electrically connected to the upper wiring.