Semiconductor Through Electrode Interconnect Design
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Solution Overview
Problem
The existing techniques for three-dimensionally mounting semiconductor devices using through electrodes restrict the degree of freedom in arranging semiconductor elements, leading to increased device size and complexity.
Innovation Solution
A semiconductor device with through electrodes and an interconnect portion that extends from the first main surface without passing through the substrate, coupled with a first insulating film, allowing for enhanced design flexibility and reduced size by enabling non-overlapping electrode arrangements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through electrodes are used for three-dimensional mounting of semiconductor devices, then electrical connectivity between stacked devices is improved, but the degree of freedom in arranging semiconductor elements is restricted
Solution Approach 1:
The electrode structure is segmented into two distinct types: through electrodes that penetrate the entire substrate thickness for vertical electrical connectivity, and partial electrodes that extend only partially through the substrate for flexible lateral arrangements. This segmentation allows different electrode types to serve different functions without mutual constraint.
Solution Approach 2:
The invention transitions from a traditional single-dimension vertical stacking approach to a multi-dimensional electrode arrangement where partial electrodes enable lateral connectivity within the substrate plane, while through electrodes maintain vertical connectivity. This adds a lateral dimension to electrode arrangement flexibility.
2Reliability
If through electrodes are arranged to overlap in the vertical direction for adequate electrical connection, then electrical connectivity is improved, but positional precision requirements increase and device complexity increases
Solution Approach 1:
By dividing the electrode system into through electrodes and partial electrodes, the invention eliminates the need for overlapping arrangements. Partial electrodes are positioned laterally within the substrate, removing vertical alignment requirements between corresponding electrodes and reducing positional precision demands.
3Reliability
If traditional through electrode arrangements are used, then electrical connectivity is achieved, but device size increases due to restricted arrangement flexibility
Solution Approach 1:
The invention utilizes the lateral dimension within the substrate plane by implementing partial electrodes that extend horizontally rather than requiring vertical overlap. This allows compact arrangement of multiple electrodes without increasing the vertical footprint, thereby reducing overall device size while maintaining connectivity.
Solution Approach 2:
Different regions of the substrate are assigned different electrode types based on local connectivity requirements. Partial electrodes are used where lateral connectivity suffices, while through electrodes are used where vertical penetration is necessary, optimizing space utilization and reducing device size.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, electrodes separated from each other and extending from a first main surface in the direction of depth of the semiconductor substrate, and an interconnect portion coupling the electrodes to each other and extending from the first main surface in the direction of depth of the semiconductor substrate without passing through the semiconductor substrate. One of the electrodes is a through electrode passing through the semiconductor substrate to reach a second main surface. For semiconductor devices having through electrodes and vertically stacked on each other, the interconnect portion serves to enhance the degree of design freedom.