Semiconductor Device With Through-Hole Electrodes

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Solution Overview

Problem

Existing semiconductor devices with laminated semiconductor and capacitor chips face issues of increased implementation area and signal transmission time due to the use of bonding wires, which can break and elongate, separating bonding pads and prolonging signal paths.

Innovation Solution

A semiconductor device design featuring through-hole electrodes that allow for direct electrical coupling between external input/output terminals and capacitor/circuit elements, reducing the need for bonding wires and minimizing signal path length.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bonding wires are used to connect semiconductor chip and capacitor chip, then electrical connection is achieved, but the implementation area increases and signal transmission time is prolonged

Engineering Contradiction:
Improveelectrical connectionVSAvoidimplementation area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the connection function by integrating the capacitor directly onto the semiconductor chip substrate, eliminating the need for separate capacitor chips and bonding wires. This consolidation reduces the overall implementation area while maintaining reliable electrical connection through on-chip capacitor structures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the capacitor element from a separate chip and integrates it directly into the semiconductor chip structure. By taking out the capacitor from its traditional separate packaging and embedding it within the chip, the implementation area is reduced and signal path length is shortened.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If bonding wires are used to connect semiconductor chip and capacitor chip, then electrical connection is achieved, but signal transmission time is prolonged

Engineering Contradiction:
Improveelectrical connectionVSAvoidsignal transmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By merging the capacitor integration into the semiconductor chip itself, the patent eliminates the external bonding wire path. The capacitor is directly connected to the circuit through on-chip interconnects, significantly reducing signal transmission time while maintaining reliable electrical connection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the capacitor from external packaging and repositions it within the chip structure, removing the bonding wire intermediary. This extraction and reintegration approach shortens the signal path from the circuit to the capacitor and back, reducing transmission time.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If bonding pads are separated to accommodate bonding wires, then electrical connection is maintained, but the area of semiconductor chip must be increased

Engineering Contradiction:
Improveelectrical connectionVSAvoidsemiconductor chip area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent merges the capacitor functionality into the chip substrate, allowing bonding pads to remain closely positioned without requiring separation for bonding wire routing. This integration enables compact pad layout while maintaining reliable electrical connection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of separating bonding pads to accommodate external bonding wires, the patent inverts the approach by integrating the capacitor internally. This allows pads to be positioned optimally for compact layout while achieving electrical connection through on-chip structures rather than external wiring.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS7598618B2Semiconductor device
Publication Date: 2009.10.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US7598618B2 patent drawing
  • US7598618B2 patent drawing
  • US7598618B2 patent drawing

AI summary

A semiconductor device that enables the transmission time of a signal and implementation area to be reduced, and a method for manufacturing the same. A semiconductor device includes a first semiconductor substrate, a capacitor chip, an external input terminal, and an external output terminal. The first semiconductor chip includes a first surface, a second surface, an eleventh through-hole electrode, a twelfth through-hole electrode, and a thirteenth through-hole electrode. The capacitor is laminated on the first semiconductor chip and includes a third surface. A capacitor element is formed on the third surface. The capacitor element functions as a condenser component in the periphery of the first semiconductor chip. The external input terminal is electrically coupled to the capacitor element and the twelfth through-hole electrode through the eleventh through-hole electrode. The external output terminal is coupled to the circuit element through the thirteenth through-hole electrode.