Semiconductor Through Via Wiring via Second Pattern Extraction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing methods for manufacturing semiconductor chips with through vias are complex and costly due to the need to etch multiple materials, complicating the formation of through holes and increasing production costs.

Innovation Solution

The solution involves forming a semiconductor chip with a multi-layered wiring structure and a second wiring pattern in the insulating layers to connect through vias to external connection terminals, allowing through holes to be formed by passing through the semiconductor substrate alone, simplifying the etching process and reducing production costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through holes are formed by etching multiple materials (insulating films, multi-layered wiring structure, semiconductor substrate), then through vias can be connected to external connection terminals, but the manufacturing process becomes complicated and production cost increases

Engineering Contradiction:
Improveelectrical connection between through via and external connection terminalVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the second wiring pattern formation from the through hole etching process. By pre-forming the second wiring pattern in the insulating layers before creating through holes, the complex multi-material etching process is simplified to only require etching the semiconductor substrate, thereby reducing manufacturing process complexity while maintaining electrical connection reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The second wiring pattern is formed in advance (preliminarily) in the insulating layers before the through holes are created. This preliminary action allows the wiring pattern to be ready to receive and conduct electrical signals to the through vias once they are formed, simplifying the overall manufacturing sequence and reducing process complexity

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If through holes are formed by etching multiple materials individually, then through vias can be properly positioned and connected, but production cost increases

Engineering Contradiction:
Improvethrough hole positioning accuracyVSAvoidproduction cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The second wiring pattern is formed preliminarily in the insulating layers with precise positioning before through holes are created. This preliminary wiring pattern serves as a guide and target for through hole formation, ensuring accurate positioning while simplifying the etching process to only the semiconductor substrate, thereby maintaining manufacturing precision while reducing production cost

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The manufacturing process is segmented into distinct stages: first forming the second wiring pattern in insulating layers, then separately forming through holes in the semiconductor substrate. This segmentation allows each process to be optimized independently, maintaining positioning accuracy while reducing overall complexity and cost

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8338289B2Method of manufacturing a semiconductor chip including a semiconductor substrate and a through via provided in a through hole
Publication Date: 2012.12.25 SHINKO ELECTRIC IND CO LTD
  • US8338289B2 patent drawing
  • US8338289B2 patent drawing
  • US8338289B2 patent drawing

AI summary

A semiconductor chip includes a semiconductor substrate, a through via provided in a through hole that passes through the semiconductor substrate, insulating layers laminated on the semiconductor substrate, a multi-layered wiring structure having a first wiring pattern and a second wiring pattern, and an external connection terminal provided on an uppermost layer of the multi-layered wiring structure, wherein the through via and the external connection terminal are connected electrically by the second wiring pattern.