Semiconductor Contact Barrier Using Segmented Titanium Deposition

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Solution Overview

Problem

The increasing packaging density and reduced device dimensions in semiconductor ICs pose challenges for contact fabrication, particularly in achieving conformal step coverage and preventing chemical reactions, which are not adequately addressed by existing CVD-based titanium nitride deposition methods.

Innovation Solution

A method involving physical vapor deposition (PVD) for the first titanium layer, followed by plasma-enhanced chemical vapor deposition (PECVD) for the second titanium layer, and chemical vapor deposition (CVD) for the titanium nitride barrier layer, ensuring conformal coverage and preventing overhang, while controlling temperature and gas flow to maintain stability and uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If chemical vapor deposition (CVD) is used to deposit titanium nitride barrier layer, then the barrier layer can be formed, but conformal step coverage is not achieved and overhang occurs

Engineering Contradiction:
Improveconformal step coverageVSAvoiddeposition process simplicity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The deposition process is segmented into multiple sequential steps: first depositing a titanium layer, then forming titanium silicide through thermal reaction, and finally depositing the titanium nitride barrier layer. This segmentation allows each step to be optimized independently, achieving conformal coverage that a single CVD step cannot provide

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The titanium layer is deposited preliminarily before the barrier layer formation. This preliminary titanium layer serves as a foundation that enables subsequent conformal barrier layer deposition by filling contact openings and providing a uniform surface, preventing the overhang problem that occurs with direct CVD barrier layer deposition

Inventive Principle:
Principle #10Preliminary action

2Reliability

If CVD titanium deposition is conducted at high temperature to form titanium silicide, then titanium silicide forms immediately, but thermal stability control becomes challenging

Engineering Contradiction:
Improvetitanium silicide formationVSAvoiddeposition temperature stability
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The titanium layer is deposited preliminarily at controlled temperatures before thermal silicide formation. This preliminary deposition step allows precise temperature control during barrier layer formation, separating the silicide formation temperature control from the barrier layer deposition temperature control to enhance overall thermal stability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The process utilizes parameter changes by conducting titanium layer deposition at one temperature regime and then performing thermal annealing at a different temperature regime to form titanium silicide. This separation of temperature parameters allows optimization of each step independently, improving thermal stability control

Inventive Principle:
Principle #35Parameter changes

3Productivity

If device dimension is reduced to increase packaging density, then integration level increases, but contact fabrication becomes more difficult

Engineering Contradiction:
Improvepackaging densityVSAvoidcontact fabrication precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The contact structure is segmented into multiple conformal layers (titanium layer, titanium silicide layer, titanium nitride barrier layer) deposited sequentially. This segmentation enables precise control of each layer's thickness and coverage, achieving the manufacturing precision required for reduced device dimensions and higher packaging density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each layer in the contact structure is deposited with specific local properties: the titanium layer provides conformal coverage, the titanium silicide layer provides controlled thermal reaction characteristics, and the titanium nitride layer provides barrier properties. This local quality optimization enables precise contact fabrication at reduced dimensions

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides improved step coverage, reduced contact resistance, and enhanced thermal stability of the titanium silicide layer, leading to superior performance and reliability of the contact barrier layer in semiconductor devices.

Implementation Method 1

A method involving physical vapor deposition (PVD) for the first titanium layer

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

followed by plasma-enhanced chemical vapor deposition (PECVD) for the second titanium layer

Methodology Applied
Scientific EffectPlasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 3

and chemical vapor deposition (CVD) for the titanium nitride barrier layer

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 4

so that titanium silicide (TiSi2) forms immediately when Ti layer is deposited

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Data Source

PatentUS8519541B2Semiconductor device having plural conductive layers disposed within dielectric layer
Publication Date: 2013.08.27 MACRONIX INTERNATIONAL CO LTD
  • US8519541B2 patent drawing
  • US8519541B2 patent drawing
  • US8519541B2 patent drawing

AI summary

A method for manufacturing a semiconductor device is disclosed. A semiconductor substrate such as bare silicon is provided, and a dielectric layer is formed over the semiconductor substrate. An opening is provided within the dielectric layer by removing a portion of the dielectric layer. A conformal first conductive layer is formed over the dielectric layer and the opening. A conformal second conductive layer is formed over the first conductive layer. A conformal barrier layer is formed over the second conductive layer.