Semiconductor Integrated Circuit Transfer Circuit Noise Cancellation

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Solution Overview

Problem

Noise generated in semiconductor integrated circuits due to capacitive coupling between wirings affects data transfer efficiency in non-volatile memory systems, leading to increased data transfer times and potential errors.

Innovation Solution

The implementation of a semiconductor integrated circuit with a transfer circuit that controls data transfer between two data buses, allowing for bidirectional data transfer and using an inverter circuit to cancel out noise by inverting data signals, thereby reducing the impact of capacitive coupling noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is transferred through wirings in semiconductor integrated circuits, then data transfer is enabled, but noise is generated due to capacitive coupling between wirings

Engineering Contradiction:
Improvedata transfer speedVSAvoidnoise from capacitive coupling
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

A transfer circuit is introduced as an intermediary component between sense amplifier units and data latches. This transfer circuit includes multiple data buses that act as mediators to transfer data signals, thereby reducing the direct capacitive coupling between wirings and the noise it generates during data transfer operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The data transfer path is segmented into multiple data buses within the transfer circuit. By dividing the data transfer into separate bus segments, the patent reduces the capacitive coupling effect between adjacent wirings, thereby minimizing noise generation while maintaining data transfer functionality.

Inventive Principle:
Principle #1Segmentation

2Reliability

If noise is reduced through inverter circuit, then data transfer accuracy is improved, but data transfer time increases

Engineering Contradiction:
Improvedata transfer accuracyVSAvoiddata transfer time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Inverter circuits are selectively applied only where necessary in the transfer circuit to cancel noise in specific data buses, rather than applying them uniformly throughout the entire data path. This partial application reduces the overall impact on data transfer time while still achieving noise reduction and improving data transfer accuracy in critical paths.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances data transfer speed and accuracy by reducing noise interference, allowing for faster and more reliable data transfer between sense amplifier units and data latches, thereby improving the overall performance of non-volatile memory systems.

Implementation Method 1

Noise is generated in the wirings due to the capacitive coupling between the wirings

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS12119076B2Semiconductor integrated circuit
Publication Date: 2024.10.15 KIOXIA CORP
  • US12119076B2 patent drawing
  • US12119076B2 patent drawing
  • US12119076B2 patent drawing

AI summary

A semiconductor integrated circuit includes a plurality of sense amplifier units including a first group of sense amplifier units and a second group of sense amplifier units, a first data bus, a second data bus, a transfer circuit between the first data bus and the second data bus, and a data latch connected to the second data bus and to the first data bus through the transfer circuit and the second data bus. Each sense amplifier unit is connected to one of the bit lines. The first data bus is connected to each of the sense amplifier units in the first group. The second data bus is connected to each of the sense amplifier units in the second group. The transfer circuit controls the transfer of data between the first data bus and the second data bus in both directions.