Semiconductor Device Transistor Integration via Local Quality
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Solution Overview
Problem
The challenge lies in manufacturing semiconductor devices with transistors having different electrical characteristics without significantly increasing the number of manufacturing steps, which often leads to decreased productivity and yield due to the complexity of integrating multiple transistor types in a single device.
Innovation Solution
The solution involves forming first and second transistors with different electrical characteristics on the same layer using semiconductor materials with varying electron affinities, where insulators are strategically deposited using atomic layer deposition to prevent oxygen diffusion and impurity entry, thereby maintaining the unique characteristics of each transistor without increasing the manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple transistor types with different electrical characteristics are integrated in a single device, then design flexibility and functionality are improved, but manufacturing complexity and process difficulty increase significantly
Solution Approach 1:
The patent applies local quality by forming semiconductor layers with different electron affinities (e.g., In-Ga-Zn-O with different Ga/In ratios) in different regions of the same device layer. This allows each transistor to have tailored electrical characteristics (threshold voltage, mobility) while using a unified manufacturing process, thus achieving design flexibility without proportionally increasing manufacturing complexity.
Solution Approach 2:
The patent changes material parameters (electron affinity, carrier concentration) by adjusting the composition ratios of oxide semiconductor materials. By varying the Ga/In ratio or oxygen content in In-Ga-Zn-O layers, transistors with different electrical characteristics are created within the same manufacturing step, avoiding the need for separate processing lines for different transistor types.
2Adaptability or versatility
If multiple transistor types with different electrical characteristics are integrated in a single device, then functionality is improved, but productivity decreases due to increased manufacturing steps
Solution Approach 1:
The patent creates a universal manufacturing process that can produce multiple transistor types simultaneously. A single oxide semiconductor layer formation process, followed by selective etching or composition adjustment, generates both high-mobility transistors (for logic circuits) and low-leakage transistors (for memory) in one production run, maintaining productivity while enhancing functionality.
Solution Approach 2:
The patent merges the manufacturing of different transistor types into a single integrated process flow. By combining material deposition, pattern formation, and selective removal steps, the process produces multiple transistor varieties without requiring separate fabrication lines, thus preserving productivity while achieving functional diversity.
3Area of stationary object
If transistors with different electrical characteristics are formed on the same layer, then device miniaturization and integration density are improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary action by forming a uniform oxide semiconductor layer with controlled composition across the entire substrate before any differentiation occurs. This initial uniform layer ensures consistent baseline properties, and subsequent selective modifications (etching, annealing) create the desired variations without compromising overall manufacturing precision or integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of semiconductor devices with enhanced electrical characteristics, improved miniaturization, high integration, long data retention, high-speed data writing, and low power consumption, while maintaining design flexibility without escalating manufacturing steps.
Implementation Method 1
an insulator that is in contact with a side surface of the gate insulator... the insulator in contact with the gate insulator can prevent outward diffusion of oxygen contained in the gate insulator
Implementation Method 2
entry of impurities such as water or hydrogen into the gate insulator can be prevented by the insulator
Implementation Method 3
The insulator is preferably deposited by an atomic layer deposition (ALD) method
Data Source
AI summary
A semiconductor device having favorable electric characteristics is provided. The semiconductor device includes a first transistor and second transistor. The first transistor includes a first conductor over a substrate; a first insulator thereover; a first oxide thereover; a second insulator over thereover; a second conductor including a side surface substantially aligned with a side surface of the second insulator and being over the second insulator; a third insulator including a side surface substantially aligned with a side surface of the second conductor and being over the second conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the second conductor, and a side surface of the third insulator; and a fifth insulator in contact with the first oxide and the fourth insulator. The second transistor includes a third conductor; a fourth conductor at least part of which overlaps with the third conductor; and a second oxide between the third conductor and the fourth conductor. The third conductor and the fourth conductor are electrically connected to the first conductor.