Semiconductor Die With Transmissive Layer For Stimulus Response

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Solution Overview

Problem

There is a need for a cost-effective semiconductor device with an active region responsive to external stimuli, particularly in modern electronic products where smaller, higher-density components are required for efficient power consumption and performance.

Innovation Solution

The method involves forming a semiconductor device with an active region, encapsulating it, and creating a conductive layer and transmissive layer, with bumps electrically connected to the conductive layer on one side, allowing the active region to respond to external stimuli such as light or other environmental factors through the transmissive layer, which can be made of optical dielectric materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the semiconductor die size is reduced to achieve smaller footprint and lower power consumption, then productivity and energy efficiency are improved, but the complexity of manufacturing and packaging processes increases

Engineering Contradiction:
Improvepower consumption efficiencyVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from traditional planar packaging to a three-dimensional stacked architecture where multiple semiconductor dies are vertically integrated. This dimensional change allows higher density and functionality within a smaller footprint while managing complexity through modular layering rather than planar expansion

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where semiconductor dies are stacked vertically with each die containing complete functional circuits. The encapsulant encapsulates multiple nested dies, and the substrate provides the base layer, creating a hierarchical nested arrangement that maximizes space utilization and reduces overall device footprint

Inventive Principle:
Principle #7Nested doll (Nesting)

2Adaptability or versatility

If an active region responsive to external stimuli is integrated into the semiconductor die, then device functionality and adaptability are improved, but the manufacturing complexity and process steps increase

Engineering Contradiction:
Improvestimulus response capabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent integrates multiple functional regions within each semiconductor die, including both active stimulus-responsive regions and passive support structures. The same manufacturing process fabricates both types of regions simultaneously, allowing a single die to perform multiple functions (stimulus detection, signal processing, and structural support) without requiring separate manufacturing lines

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the active stimulus-responsive region and the passive support region into a single integrated semiconductor die structure. The conductive layer and encapsulant serve dual purposes: electrical connectivity for active regions and mechanical support for the entire stacked assembly, reducing the number of separate components and simplifying the overall manufacturing process

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If multiple layers including encapsulant, conductive layer, and transmissive layer are formed, then device protection and functionality are improved, but the manufacturing time and process complexity increase

Engineering Contradiction:
Improvedevice protectionVSAvoidmanufacturing cycle time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary formation of the conductive layer pattern and transmissive layer structure before final die stacking. The conductive layer is pre-patterned with contact pads and interconnect structures, and the transmissive layer is pre-formed with appropriate optical properties, allowing these layers to be integrated into the stacked structure without requiring additional post-assembly processing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent optimizes the material properties and thickness parameters of each layer (encapsulant, conductive layer, transmissive layer) to achieve the required protection and functionality with minimal layer counts. By carefully selecting material parameters such as encapsulant hardness, conductive layer conductivity, and transmissive layer optical transmission, the design achieves reliable device protection with fewer manufacturing steps

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of smaller, more efficient semiconductor devices that can effectively respond to external stimuli, enhancing performance and reducing power consumption while maintaining cost-effectiveness.

Implementation Method 1

forming a transmissive layer over the semiconductor die and the active region... allowing the active region to respond to external stimuli such as light or other environmental factors through the transmissive layer

Methodology Applied
Scientific EffectLight transmission through transmissive layer: Refraction

Data Source

PatentUS9553162B2Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus
Publication Date: 2017.01.24 STATS CHIPPAC LTD
  • US9553162B2 patent drawing
  • US9553162B2 patent drawing
  • US9553162B2 patent drawing

AI summary

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A conductive layer can be formed over the encapsulant and the semiconductor die. A transmissive layer can be formed over the semiconductor die. An interconnect structure can be formed through the encapsulant and electrically connected to the conductive layer, whereby the interconnect structure is formed off to only one side of the semiconductor die.