Semiconductor Trench Design for Active Region Integration
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Solution Overview
Problem
Existing semiconductor device fabrication methods face challenges in achieving high integration and sufficient contact area between active regions and contact plugs, with current techniques being complex and prone to process deviations.
Innovation Solution
The semiconductor device incorporates parallel-trenches and intersect-trenches on a semiconductor substrate to confine active regions, with the intersect-trenches being straight lines that cross the parallel-trenches, forming acute angles to enhance contact area and simplify the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods of forming active regions are used, then manufacturing process complexity increases and process deviations occur, but achieving high integration and sufficient contact area becomes difficult
Solution Approach 1:
The patent divides the trench structure into two distinct sets: parallel-trenches extending in a first direction and intersect-trenches extending in a second direction. This segmentation allows each set of trenches to be formed and controlled independently, simplifying the manufacturing process while achieving precise active region definition and sufficient contact area for contact plugs
Solution Approach 2:
The patent introduces a dimensional approach by forming trenches in two different directions (first direction and second direction) rather than using a single set of parallel trenches. This dimensional change enables the active regions to be properly confined while providing adequate contact area, resolving the contradiction between precision and process complexity
2Productivity
If the number of trenches and their intersections are increased to achieve high integration, then the contact area between active regions and contact plugs may be insufficient
Solution Approach 1:
The patent employs asymmetric spacing between the parallel-trenches and intersect-trenches, with different spacing values in the first direction versus the second direction. This asymmetric design allows optimization of both integration density and contact area, as the spacing can be independently tuned to meet both requirements simultaneously
Data Source
AI summary
A semiconductor device includes a plurality of parallel-trenches that are parallel to each other, a plurality of intersect-trenches that are parallel to each other, a plurality of active regions that are confined by the parallel-trenches and the intersect-trenches, a plurality of lower conductive lines that cross the active regions, a plurality of upper conductive lines that are parallel to each other, that cross the lower conductive lines, and that cross over the active regions, and data storage elements connected to the active regions. Each of the parallel-trenches and the intersect-trenches is a straight line. The parallel-trenches cross the upper conductive lines and form a first acute angle with the upper conductive lines. The intersect-trenches cross the parallel-trenches and form a second acute angle with the parallel-trenches.