Semiconductor Device Trench Anode Area Efficiency
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Solution Overview
Problem
Conventional semiconductor devices have poor area efficiency due to the planar arrangement of hetero semiconductor regions, hindering the enhancement of integration degree.
Innovation Solution
The anode region is formed at the bottom of a trench or in the drift region beneath it, with a contact hole allowing the source electrode to be embedded and connected to the anode region while being insulated from the gate electrode, enhancing area efficiency and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the hetero semiconductor region is arranged in the plane direction adjacent to gate electrodes, then the device structure is simple, but the area efficiency is poor and integration degree is reduced
Solution Approach 1:
The patent transitions from planar arrangement to vertical arrangement by forming the anode region at the bottom of the trench structure and connecting it to the source electrode through a contact hole. This vertical configuration in the depth direction significantly improves area efficiency while maintaining structural simplicity
Solution Approach 2:
The anode region is nested within the trench structure at the bottom portion, and the contact hole is formed within the trench to connect the source electrode to the anode region. This nested arrangement optimizes space utilization and enhances integration degree
2Area of stationary object
If the anode region is formed at the bottom of the trench, then area efficiency is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The anode region is formed in advance at the bottom of the trench before the gate electrode is formed. This preliminary formation allows subsequent processes to proceed more easily, as the anode region is already in position to receive the contact hole and source electrode connection
3Reliability
If the contact hole is formed to connect source electrode and anode region, then parasitic resistance is reduced, but the device structure becomes more complex
Solution Approach 1:
The contact hole extracts the electrical connection path from the planar configuration to a direct vertical path through the trench. This extraction creates a shorter and more direct connection between the source electrode and anode region, reducing parasitic resistance while the added structural element is minimal
Data Source
Figure 1~2A
Figure 2B~2C
Figure 2D~2E
AI summary
An anode region 106 is formed on a bottom portion of a trench 105 in which a gate electrode 108 is formed or in a drift region 102 immediately under the trench 105. A contact hole 110 is formed in the trench 105 at a depth reaching the anode region 106. A source electrode 112 is embedded in the contact hole 110 while interposing an inner wall insulating film 111 therebetween. The anode region 106 and the source electrode 112 are electrically connected to each other in a state of being insulated from the gate electrode 108 by the inner wall insulating film 111.